Texas Instruments Corporation

Texas Instruments France

Alain Bruno Chateau

Franck Benjamin Dahan

Jerome Laurent Azema

Peter Cumming

Christian Roussel

Eric Balard

Bent Henneberg Rysgaard

Maija Kristiina Kuusela

Franck Seigneret

Lars Holst Christensen

Vasile Zoicas

D Georges Poissonnier

Claude Marescot

Seyed Karim Djafarian Tehrani

Constantin Haidamous

Franck Dahan

Peter Harry Cumming

A multifunction antenna is described in which the multifunction antenna is divided into a first segment and a second segment by an impedance circuit that produces low impedance at a low frequency and high impedance at a high frequency. A high frequency radio frequency (HF-RF) signal may be transmitted or received using only the first segment of the multifunction antenna from a HF-RF transceiver by blocking the HF-RF signal from the second segment by the impedance circuit. A low frequency radio frequency (LF-RF) signal may be received using both the first segment and the second segment of the multifunction antenna by passing the LF-RF signal through the impedance circuit.

Multifunction single antenna for contactless systems

A digital system is provided that includes a number of hardware accelerators. Each hardware accelerator is paired with a synchronization module that is configured to determine when a scheduled task can be started. Each synchronization module includes a network interface configured to send and receive messages to and from other synchronization modules and a configuration interface configured to receive task information from a host processor. Each synchronization module also includes a task scheduler configured to select a task in response to a received message and a task processor interface configured to initiate the selected task on a hardware accelerator coupled to the synchronization module.

Video synchronization with distributed modules

A computing platform () protects system firmware () using a manufacturer certificate (). The manufacturer certificate binds the system firmware () to the particular computing platform (). The manufacturer certificate also stores configuration parameters and device identification numbers. A secure run-time platform data checker () and a secure run-time checker () check the system firmware during operation of the computing platform () to ensure that the system firmware () or information in the manufacturer certificate () has not been altered. Application software files () and data files () are bound to the particular computing device () by a platform certificate (). Configuration parameters may be stored in a data file () with an associated platform certificate ().

Secure management of configuration parameters in a computing platform

A digital system is provided with a secure mode (3level of privilege) built in a non-invasive way on a processor system that includes a processor core, instruction and data caches, a write buffer and a memory management unit. A secure execution mode is thus provided on a platform where the only trusted software is the code stored in ROM. In particular the OS is not trusted, all native applications are not trusted. A secure execution mode is provided that allows virtual addressing when a memory management unit (MMU) is enabled. The secure execution mode allows instruction and data cache to be enabled. A secure execution mode is provided that allows all the system interruptions to be unmasked. The secure mode is entered through a unique entry point. The secure execution mode can be dynamically entered and exited with full hardware assessment of the entry/exit conditions. A specific set of entry conditions is monitored that account for caches, write buffer and MMU being enabled. The structure of the activation sequence code accounts for caches, write buffer and MMU being enabled. The structure of the exit sequences code accounts for caches, write buffer and MMU being enabled. A specific way is provided to manage a safe exit of secure mode under generic interruptions and allows return from interruption through entry point and activation sequence and a proper resuming of the secure execution. A specific way is provided to manage the MMU in secure mode and provide data exchange between secure and non-secure environment.

Secure mode for processors supporting MMU and interrupts

Apparatus and method for accelerating data handling in the protocol stack of a networked device. Embodiments of the disclosed invention may be used to increase the throughput rate of a networked device while offloading processing from the device's host processor. A method includes building a set of descriptors that describe the operations to be performed by a Protocol DMA Engine. A host processor builds the set of descriptors in lieu of performing the operations described by the descriptors. The set of descriptors is provided to the Protocol DMA Engine. The Protocol DMA Engine executes the operations described in the set of descriptors to produce a protocol layer output data unit from a protocol layer input data unit. The protocol layer output data unit is provided to a next layer of a network protocol stack.

Protocol DMA engine

A computing platform () protects system firmware () using a manufacturer certificate (). The manufacturer certificate binds the system firmware () to the particular computing platform (). The manufacturer certificate may also store configuration parameters and device identification numbers. A secure run-time platform data checker () and a secure run-time checker () check the system firmware during operation of the computing platform () to ensure that the system firmware () or information in the manufacturer certificate () has not been altered. Application software files () and data files () are bound to the particular computing device () by a platform certificate (). A key generator may be used to generate a random key and an encrypted key may be generated by encrypting the random key using a secret identification number associated with the particular computing platform (). Only the encrypted key is stored in the platform certificate ().

Run-time firmware authentication

Indirect data protection using random key encryption

Secure mode for processors supporting interrupts

Secure mode for processors supporting MMU

A method and structure of recovering a network time-base for radio data demodulation after an IDLE period of data communication gauges a local low frequency oscillator versus the high frequency local oscillator to compute the IDLE time as an equivalent number of low frequency oscillator clock periods. Depending upon the high frequency oscillator value, the accuracy of the gauging will directly determine the IDLE period duration versus the gauging period duration in order to keep an acceptable gauging error related to the sampling errors.

Method of maintaining mobile terminal synchronization during idle communication periods

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Cagnes sur Mer, France

Alain Bruno Chateau