Tamura Corporation

National Institute of Information and Communications Technology, Incorporated

Koha Co., Ltd.

Sicoxs Corporation

Akito Kuramata

Masaru Takizawa

Kohei Sasaki

Masataka Higashiwaki

Shinya Watanabe

Kazuyuki Iizuka

Kuniaki Yagi

Naoki Hatta

Yoshikatsu Morishima

Shinkuro Sato

Keita Konishi

A semiconductor device includes a semiconductor layer including a GaO-based single crystal, and an electrode that is in contact with a surface of the semiconductor layer. The semiconductor layer is in Schottky-contact with the electrode and has an electron carrier concentration based on reverse withstand voltage and electric field-breakdown strength of the GaO-based single crystal.

Schottky barrier diode

A semiconductor substrate includes a single crystal GaO-based substrate and a polycrystalline substrate that are bonded to each other. A thickness of the single crystal GaO-based substrate is smaller than a thickness of the polycrystalline substrate, and a fracture toughness value of the polycrystalline substrate is higher than a fracture toughness value of the single crystal GaO-based substrate.

Semiconductor substrate, semiconductor element and method for producing semiconductor substrate

A semiconductor element includes a base substrate that includes a GaO-based crystal having a thickness of not less than 0.05 &#x3bc;m and not more than 50 &#x3bc;m, and an epitaxial layer that includes a GaO-based crystal and is epitaxially grown on the base substrate. A semiconductor element includes an epitaxial layer that includes a GaO-based crystal including an n-type dopant, an ion implanted layer that is formed on a surface of the epitaxial layer and includes a higher concentration of n-type dopant than the epitaxial layer, an anode electrode connected to the epitaxial layer, and a cathode electrode connected to the ion implanted layer.

Semiconductor element, method for manufacturing same, semiconductor substrate, and crystal laminate structure

A semiconductor device, includes an n-type semiconductor layer provided with a first semiconductor layer with a low electron carrier concentration and a second semiconductor layer with a high electron carrier concentration, an electrode that is in Schottky-contact with a surface of the first semiconductor layer, and an ohmic electrode formed on a surface of the second semiconductor layer. The n-type semiconductor layer is formed of a GaO-based single crystal. The first semiconductor layer has an electron carrier concentration Nd based on reverse withstand voltage VRM and electric field-breakdown strength Em of the GaO-based single crystal.

A Schottky barrier diode includes an n-type semiconductor layer including a GaO-based compound semiconductor with n-type conductivity, and an electrode layer that is in Schottky-contact with the n-type semiconductor layer. A first semiconductor layer in Schottky-contact with the electrode layer and a second semiconductor layer having an electron carrier concentration higher than the first semiconductor layer are formed in the n-type semiconductor layer. The second semiconductor layer includes a &#x3b2;-GaOsubstrate including a main plane rotated by an angle not less than 50&#xb0; and not more than 90&#xb0; with respect to a (100) plane thereof.

A Schottky barrier diode is provided with: an n-type semiconductor layer including GaO-based compound semiconductors with n-type conductivity; and a Schottky electrode layer which is in Schottky-contact with the n-type semiconductor layer. An n-type semiconductor layer, which has a relatively low electron carrier concentration and is brought into Schottky-contact with the Schottky electrode layer, and an nsemiconductor layer, which has a higher electron carrier concentration than the n semiconductor layer, are formed in the n-type semiconductor layer.

A method for manufacturing a semiconductor stacked body, and a semiconductor element including the semiconductor stacked body includes a semiconductor stacked body, including a GaOsubstrate having, as a principal plane, a plane on which oxygen atoms are arranged in a hexagonal lattice, an AlN buffer layer formed on the GaOsubstrate, and a nitride semiconductor layer formed on the AlN buffer layer.

Growing community of inventors

Tokyo, Japan

Akito Kuramata