Nec Electronics Corporation

Akira Yukawa

Jun Ikeda

There is provided a voltage comparator circuit with even lower power consumption. It comprises an FET Q, to the gate of which a signal input terminal INis connected, an FET Q, to the gate of which a signal input terminal INis connected, a bistable circuit, an AND circuit G, and an FET Q. A pulse signal &#x3c6;, which becomes a strobe signal for the comparison, is supplied to the bistable circuit, and when the pulse signal &#x3c6; is at a low level, the logic values of output terminals OUTand OUTgo to a high level, and the output of the AND circuit G becomes high, turning the FET Qon. When the pulse signal &#x3c6; changes to a high level from a low level, input voltages are compared, one of the output terminals OUTor OUTchanges to a low level, corresponding to the value relationship between the drain currents of the FETs Qand Q, and the output of the AND circuit G goes to a low level, turning the FET Qoff. The power consumption is reduced because the source currents of the FETs Qand Qflow only during a short period of time when the operation of comparison is being performed.

Voltage comparator circuit

A successive approximation AD converter. A voltage comparator receives an analog input signal and a reference voltage. A successive approximation register receives the voltage comparator output, and a DA converter, connected to the successive approximation register, provides another analog signal to the voltage comparator. The voltage comparator includes differential amplifiers and an output amplifier connected in series via capacitance pairs, a first switch connecting the analog input signal to the first differential amplifier, a second switch connecting the first switch and the sampling capacitor to the reference voltage supply section, and a third switch connecting the first switch and the first differential amplifier to the reference voltage. When the input analog signal is sampled, the first switch is switched OFF, and the second and third switches are switched ON. When a voltage comparison is executed, the first switch is switched ON, and the second and third switches are switched OFF.

Successive approximation ad converter having pulse noise suppression

A random number generating method and a random number generating device are provided which are capable of generating uniform random numbers. Random pulses are generated by comparing a voltage level obtained by amplifying a voltage level of a thermal noise produced by a thermal noise generating device with a reference voltage level. A pulse controller, if time intervals among random pulses are within a predetermined time, excludes random pulses occurred within the predetermined time and if time intervals among random pulses exceed the predetermined time, random numbers are generated based on time intervals among pulses measured by a counter.

Random number generating method and random number generating device

An apparatus for measuring an impedance produces an alternating current from digital codes representative of a sine wave, and converts an ac voltage due to an alternating current flowing into an object to a digital signal; a multiplier successively multiplies the binary values of the digital signal by the binary values of the digital codes representing the sine wave and a cosine wave, an accumulator successively adds the products, and a microcomputer calculates the impedance of the object on the basis of the sums of products, thereby improving the accuracy of the calculating result.

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Kanagawa, Japan

Akira Yukawa