Hitachi, Ltd.

Akira Yoshinaka

Yoshimitsu Sugita

Hirofumi Shimizu

Takaaki Aoshima

In a method of making a semiconductor device, a semiconductor wafer having a stacking fault originally contained in the wafer or produced in the wafer through the thermal oxidation of the wafer surface is subjected to an annealing treatment in a non-oxidative atmosphere to eliminate the stacking fault. A PN junction is thereafter formed in an area of the wafer from which the stacking fault is eliminated.

Method of making semiconductor device with PN junction in stacking-fault

In a method of heat-treating a number of wafers each of which consists of a substance of poor heat conduction and a semiconductor layer formed on one surface of the substance, a method of heat treatment of wafers characterized in that the heat treatment is carried out under the state under which an auxiliary wafer made of a substance of good heat conduction is held in proximity to the other surface of the substance of poor heat conduction, whereby the wafers for the heat treatment are prevented from being cracked and have the characteristics made uniform.

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Tokyo, Japan

Akira Yoshinaka