Renesas Electronics Corporation

Nec Electronics Corporation

Nippon Kokan Kabushiki Kaisha

Akira Uemura

Osamu Soma

Akihiro Nakahara

Shinji Akita

Kenji Amada

Masayuki Hatanaka

Hiroyuki Nakamura

Tadatoshi Danno

Shiro Tsunai

Atsushi Nishikizawa

Noboru Takatsuka

A semiconductor device includes first and second semiconductor chips mounted on one package. In the first semiconductor chip, a current generation circuit generates a sense current in accordance with a load current and a fault current indicating that an abnormality detection circuit has detected an abnormality, and allows either one of the currents to flow through a current detecting resistor in accordance with presence or absence of detection of the abnormality. In the second semiconductor chip, a storage circuit stores a current value of the fault current obtained in an inspection process of the semiconductor device as a determination reference value. An arithmetic processing circuit sets a standard range based on the determination reference value, and determines presence or absence of detection of the abnormality based on whether or not a current value indicated by a digital signal of an analog-digital conversion circuit is included within the standard range.

Semiconductor device, electronic control unit and vehicle apparatus

A semiconductor integrated power device including: an output transistor configured to drive an external load element; a temperature detection circuit configured to: output a first detection signal in reference to a temperature difference between a temperature of the output transistor and an ambient temperature; and output a second detection signal in reference to a temperature difference between a temperature of the output transistor and a first reference temperature; and a current limiter circuit configured to limit a current flowing through the output transistor according to the first detection signal and the second detection signal. The temperature detection circuit activates and inactivates the first detection signal or the second detection signal based on an output of a first hysteresis circuit.

Semiconductor device, and on-vehicle electronic device and automobile each including the semiconductor device

A control method of a semiconductor device includes inspecting an electrical property of a current detection circuit in the first semiconductor chip, writing information on a correction equation obtained on the basis of an inspection result in a memory circuit of the second semiconductor chip, and correcting, with the second semiconductor chip, a detection result obtained by the current detection circuit on the basis of the information on the correction equation.

Current detection method of semiconductor device and semiconductor device

A sophisticated semiconductor device is provided. A semiconductor device including an IPD chip and an MCU chip which are included in one package. The IPD chip includes: a power transistor that drives an external load; a gate drive circuit that drives the power transistor; and a protection circuit that protects the power transistor from having a breakdown. The MCU chip includes an arithmetic processing unit that performs arithmetic processing based on detected data output from the protection circuit, and a storage unit that stores a program for the arithmetic processing unit. The MCU chip has a function of controlling operation of the power transistor according to the detected data.

Semiconductor device

A semiconductor device with the highly precise current detecting function is provided. Current detection is performed using a semiconductor device in which two semiconductor chips are mounted in one package. The first semiconductor chip is provided with an electric power supply transistor to supply power to a load via a load driving terminal, and a current detection circuit to detect a current flowing through the load driving terminal. In the inspection process of the semiconductor device, the electrical property of the current detection circuit in the first semiconductor chip is inspected, and the information on a correction equation obtained as the inspection result is written in a memory circuit of the second semiconductor chip. The second semiconductor chip corrects the detection result obtained by the current detection circuit based on the information on the correction equation written in the memory circuit concerned.

A load driving deviceincludes a temperature detector TDthat sets a temperature difference detection signal dt_ot to active when a temperature difference Tdif between a temperature Ttr of an output transistor Tand an ambient temperature becomes more than a reference temperature difference Tdref, and sets an over temperature detection signal at_ot to active when the temperature Ttr of the output transistor Tbecomes higher than a reference temperature Tref, a current limiter ILthat limits a GS current of the output transistor Twhen any one of the detection signals becomes active, and the output transistor Tthat turns off regardless of an external input signal IN when any one of the detection signals becomes active. The temperature detector TDsets the temperature difference detection signal dt_ot to inactive when the temperature difference Tdif between the output transistor temperature Ttr and the ambient temperature becomes equal to or less than a reference temperature difference Tdref, and sets the over temperature detection signal at_ot to inactive when the output transistor temperature Ttr becomes equal to or lower than a reference temperature Tref

Semiconductor device, and on-vehicle electronic device and automobile each including semiconductor device

A semiconductor device includes first and second semiconductor chips, a plurality of leads, a plurality of wires, and a sealing body sealing those components. A first pad electrode, a second pad electrode, and an internal wiring electrically connected to the first and second electrode pads are formed on a main surface of the first semiconductor chip. A third pad electrode of the second semiconductor chip is electrically connected to the first electrode pad of the first semiconductor chip via a first wire, and the second electrode pad of the first semiconductor chip is electrically connected to a first lead via a second wire. A distance between the first lead and the first semiconductor chip is smaller than a distance between the first lead and the second semiconductor chip. The first electrode pad, the second electrode pad and the internal wiring are not connected to any circuit formed in the first semiconductor chip.

A CCD image sensor includes a photo-diode region segmented by an element separation region; and a CCD register connected with the photo-diode region through a transfer gate. The photo-diode region includes a plurality of tapered portions, and each of the plurality of tapered portions is formed to become wider in a direction of the transfer gate.

CCD image sensor

A solid-state imaging device includes a light receiving section (LRS) comprising pixels. The LRS is divided into division regions; a charge transferring section (CTS) transferring charges accumulated in the LRS; an accumulation control electrode provided between the LRS and the CTS transfers charge accumulated in the LRS to the CTS responsive to an accumulation control signal; a monitoring sensor group comprising monitoring sensors respectively provided for the division regions, outputting sensor outputs of the monitoring sensors corresponding to charges amounts of the division regions; a charge detecting circuit outputting a charge detection signal indicating that a predetermined charge quantity is accumulated in at least one of the division regions, based on the sensor outputs from the monitoring sensor group; and a signal control circuit outputting the accumulation control signal in response to the charge detection signal. The charge detecting circuit comprises division region charge detecting sections for the monitoring sensors.

Solid-state imaging device

A solid-state imaging apparatus includes a pixel array comprising a plurality of light receiving elements disposed in a charge transfer direction, the plurality of light receiving elements converting a light signal into an electric signal, a first charge transfer unit and a second charge transfer unit arranged on each side of the pixel array and transferring a signal charge input from the pixel array in the charge transfer direction, a first floating diffusion region connected to the first charge transfer unit, a second floating diffusion region connected to the second charge transfer unit, a wiring layer connecting the first floating diffusion region with the second floating diffusion region, and an output circuit connected to the wiring layer and output a signal voltage in accordance with a potential of the first floating diffusion region and the second floating diffusion region.

Solid-state imaging apparatus

A variable capacitance circuit includes a MOS capacitor, and an application voltage switching section configured to change an application voltage to the MOS capacitor to change a capacitance of the MOS capacitor. The variable capacitance circuit connects the MOS capacitor to an electronic circuit. Here, the electronic circuit may be a voltage amplification circuit, and the variable capacitance circuit may function as an amplification gain switching circuit configured to switch an amplification gain of the voltage amplification circuit, by changing the capacitance to be connected to the voltage amplification circuit.

Variable capacitor circuit and integrated circuit containing the same

A voltage amplifying circuit ( ) that may have a selectable gain has been disclosed. Voltage amplifying circuit ( ) may include a voltage amplifier ( ) and a gain changing unit ( ). A gain changing unit ( ) may be capable of changing at least one of: a capacitance between a signal input terminal ( ) and an input terminal of a voltage amplifier, the capacitance between an input terminal of a voltage amplifier and a ground (or reference potential), and a capacitance between an input and an output terminal ( ) of a voltage amplifier. In this way, a gain from a signal input terminal ( ) to an output terminal ( ) of a voltage amplifier of a voltage amplifying circuit ( ) may be changed.

Voltage amplifying circuit

In an apparatus for changing the rolling mill rolls and/or disk shoes of a steel pipe rolling mill, the top and bottom rolls vertically movably mounted in the housing are individually placed on a supporting bed positioned below the bottom rolling roll and moved in and out of the mill by way of rails laid in the lower part of the housing, and each of the disk shoes is mounted on a supporting arm which is movable vertically and rotatable thereby making it possible to change the disk shoes even during the operation.

Steel pipe rolling mill

In a three-roll Assel mill capable of automatically and rapidly changing the rolls, rails are arranged on an inner housing mounted within each of a fixed housing and a rotary housing to be rotatable along the inner wall thereof, and cradles having rolls mounted therein are placed on the rails, whereby during roll changing the housing proper is shifted and the inner housings are rotated in such a manner that the rails provided on the inner housings are successively aligned with rails laid externally and the rolls are moved in or out of the rolling mill.

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Tokyo, Japan

Akira Uemura