Kabushiki Kaisha Toshiba

Toshiba Memory Corporation

Akira Tanimoto

Isao Ozawa

Katsuya Murakami

Koichi Nagai

Manabu Matsumoto

Satoru Fukuchi

Shinji Honjo

Jun Tanaka

Takashi Imoto

Yasuo Kudo

Hideko Mukaida

Yuji Karakane

Yoriyasu Ando

Isao Maeda

Masaji Iwamoto

Masatoshi Kawato

Koichi Miyashita

Naoki Iwamasa

Yusuke Dohmae

Masashi Noda

Tadashi Shimazaki

Naoko Numata

Kenji Miyawaki

A semiconductor device package includes a substrate including, on an edge thereof, a connector that is connectable to a host, a nonvolatile semiconductor memory device disposed on a surface of the substrate, a memory controller disposed on the surface of the substrate, an oscillator disposed on the surface of the substrate and electrically connected to the memory controller, and a seal member sealing the nonvolatile semiconductor memory device, the memory controller, and the oscillator on the surface of the substrate.

Semiconductor device package having an oscillator and an apparatus having the same

A semiconductor package includes a board, a plurality of semiconductor memory chips, a controller chip, and a sealing resin portion. The plurality of semiconductor memory chips are stacked in a thickness direction of the board. The controller chip is disposed between the board and the plurality of semiconductor memory chips or on a side of the plurality of semiconductor chips opposite to the board. The sealing resin portion seals the plurality of semiconductor memory chips and the controller chip. The plurality of semiconductor memory chips include at least one through via that penetrates one or more semiconductor memory chips of the plurality of semiconductor memory chips in the thickness direction of the board to be connected to the controller chip.

Semiconductor package

A semiconductor device includes a package substrate having a first surface and a second surface. A semiconductor chip is provided on the first surface of the package substrate and includes a semiconductor element. An adhesive is provided between the semiconductor chip and the package substrate. A metal bump is provided on the second surface. A package substrate is a multilayer substrate that includes first to fourth wiring layers and first to third resin layers. CTE1&#x3c;CTE2&#x3c;CTE3&#x3c;CTE4 is satisfied where coefficients of thermal expansion of the semiconductor chip, the first to third resin layers, the first to fourth wiring layers, and the adhesive are CTE1 to CTE4, respectively. EM1&#x3e;EM3&#x3e;EM2&#x3e;EM4 is satisfied where elastic moduli of the semiconductor chip, the first to third resin layers, the first to fourth wiring layers, and the adhesive are EM1 to EM4, respectively.

Semiconductor device

According to one embodiment, a data storage device includes a controller driven by a first power supply voltage, a nonvolatile memory controlled by the controller and driven by a second power supply voltage, and a switch element determining whether the second power supply voltage is applied to the nonvolatile memory. The controller is configured to turn off the switch element in a first mode and turn on the switch element in a second mode.

Data storage device with nonvolatile memory

Data storage device including nonvolatile memory in which on/off state of power source voltage is controlled

A semiconductor device includes a substrate, a semiconductor memory unit mounted on a surface of the substrate, a memory controller configured to control the semiconductor memory unit and mounted on the surface of the substrate adjacent to the semiconductor memory unit, and a sealing layer disposed on the surface of the substrate and covering the semiconductor memory unit and the memory controller.

Semiconductor device having a sealing layer covering a semiconductor memory unit and a memory controller

A semiconductor device includes a substrate, a sealing portion, a controller, a semiconductor chip, and a plurality of differential signal balls. The substrate has a first surface and a second surface positioned on a side opposite to the first surface. The sealing portion is formed on the first surface of the substrate. The controller is covered with the sealing portion. The semiconductor chip is electrically connected to the controller, and is covered with the sealing portion. The plurality of differential signal balls are formed on the second surface of the substrate. At least some of the plurality of differential signal balls are arranged substantially parallel to one side of the substrate.

Semiconductor device and semiconductor package having a plurality of differential signal balls

In one embodiment, a semiconductor device includes a first semiconductor chip disposed on a circuit board, an adhesive layer fixing the first semiconductor chip to the circuit board, and a second semiconductor chip having an outer shape smaller than that of the first semiconductor chip. At least a part of the second semiconductor chip is embedded in the adhesive layer. The adhesive layer has a thickness in a range of 95 to 150 &#x3bc;m. The adhesive layer includes a cured product of a thermosetting resin whose thermal time viscosity at a time that the second semiconductor chip is embedded is in a range of 500 to 5000 Pa&#xb7;s.

Semiconductor device and method for manufacturing the same

A current limiting type circuit breaker includes first and second contact arms each pivotally mounted so as to be driven to an open position by an electromagnetic repulsive force, a trip device responsive to an output from a means for detecting a fault to drive the second contact arm to the open position, magnetic substances placed at opposite sides of the contact arms so that the magnetic resistance for magnetic fluxes occurred around the contact arms is decreased, and an attracting stationary conductor placed near the free end of the second contact arm in the open position. The attracting stationary conductor is connected in series with the first contact arm. When an excessive current flows through the contact arms, an electromagnetic attractive force is generated between the attracting stationary conductor and the second contact arm, which force increases the rate at which the second contact arm is moved to the open position.

Current limiting type circuit breaker

Growing community of inventors

Yokohama Kanagawa, Japan

Akira Tanimoto