Fuji Electric Co., Ltd.

Honda Motor Co., Ltd.

Fuji Electric Systems Co. Ltd.

Akira Nishiura

Masahito Otsuki

Shin Soyano

Hiroshi Otsuka

Masaharu Nishiura

Tadashi Miyasaka

Tomohiro Fukazu

Noriho Terasawa

Takeshi Ichimura

Kosuke Nishiyama

Masahiro Kikuchi

Ken'ya Sakurai

Tatsuya Naito

Tatsuhiko Fujihira

Naoki Kumagai

Michio Nemoto

Yasukazu Seki

Ryu Saitoh

Semiconductor device

A cooling apparatus for semiconductor chips includes radiation fins formed on the opposite surface of metal base opposite to the surface of metal base, to which an insulator base board mounting semiconductor chips thereon, is disposed. The radiation fins, such as sheet-shaped fins having different lengths are arranged such that the surface area density of the fins becomes higher in the coolant flow direction, whereby the surface area density is the total surface area of radiation fins on a unit surface area of the metal base. As a result, the temperatures of semiconductor chips arranged along the coolant flow direction are closer to each other.

Cooling apparatus for semiconductor chips

A semiconductor device, such as a pin diode, includes a first drift layer, a second drift layer, an anode layer on the first drift layer, and a buffer layer formed between the first and second drift layers. The shortest distance from the pn-junction between the anode layer and the buffer layer, and the thickness of the buffer layer are set at the respective values at which a high breakdown voltage is obtained, while reducing the tradeoff relation between the soft recovery and the fast and low-loss reverse recovery.

Semiconductor device and method of manufacturing the same

Hybrid integrated circuit for electric power control

A semiconductor apparatus includes an insulated gate semiconductor device used as a power device and a pn diode used as a temperature sensor on a single semiconductor substrate. Heat generated in the power device is conducted to the temperature sensor. The voltage across a forward biased pn diode fed by a constant current source is sensitive to temperature. The temperature of the power device is measured by feeding a small current from a constant current supply to the pn diode and by detecting the forward voltage of the pn diode. When the forward voltage reaches a predetermined value, an external protection circuit is activated to prevent overheating. Multiple pn diodes may be connected in series to detect the temperature of multiple power devices more accurately.

Semiconductor apparatus

A second region 3 is formed via a buffer layer 3a on a first region 2 formed with an anode electrode 1 on the rear and a third region 4 like a well is formed on the surface of the second region 3. A fourth region 15 like a well is formed at the center on the surface of the third region 4 and a fifth region 16 is formed along the well end. A sixth region 17 like a well is formed on the surface of the fourth region 15. Cathode electrodes 18 as metal electrodes of the first layer come in conductive contact with the fifth region 16 and the sixth region 17. A MOSFET 12 of n channel type for injecting majority carriers (electrons) is disposed from the first region 16 to the surfaces of the third region 4 and the second region 3, and a MOSFET 23 of p channel type is disposed from the sixth region 17 to the surfaces of the fourth region 16 and the third region 4. The second MOSFET 23 has a double diffusion type structure.

A control device for controlling a double gate semiconductor device having a second gate electrode for controlling transition from a thyristor operation to a transistor operation, and a first gate electrode for controlling transition from transistor operation to an ON/OFF operation, and for controlling a current passing from a collector electrode to an emitter electrode, includes a first gate control circuit for delaying a turn-off signal to the double gate semiconductor device and applying the turn-off signal to the first gate electrode.

Control device of semiconductor power device

To reduce the required diffusion depth of impurities in manufacturing a protective diode for protecting an insulated gate transistor from overvoltage so that the diode can be easily built in a chip of the transistor. A plurality of p-type diode layers are built in by diffusion through the windows in an insulation film disposed on an n-type region into which a depletion layers spread when the vertical field effect transistor to be protected is turned off, and a diode terminal A is led out from an electrode film that is in electrical contact with the diode layers. This configuration prevents depletion layers, spreading from the diode layers into the semiconductor region by the applied overvoltage, from joining with each other, and sufficiently lowers the breakdown voltage of the protective diode with respect to the withstand voltage of the transistor 10 or 20 even when the diffusion depth of the diode layer is one order of magnitude shallower than in conventional devices.

Protective diode for transistor

A semiconductor device thyristor structure includes a first conductive type collector region, second conductive type and first conductive type base regions, and a second conductive type emitter region. First conductive type regions and second conductive type regions have respective first and second type majority carriers. A first MOSFET injects the second type majority carriers into the second conductive type base region. A second MOSFET is opened and closed independent of the first MOSFET and extracts the first type majority carriers from the first conductive type base region. A third MOSFET has a first gate electrode which is also a gate electrode of the first MOSFET, for extracting the first type majority carriers from the first conductive type base region. First conductive type and second conductive type emitter regions are formed within the first conductive type base region and an emitter voltage can be simultaneously applied to these emitter regions. The first conductive type emitter region is formed within the second conductive type emitter region. A second gate electrode of the second MOSFET is formed on the surface of the first conductive type emitter region, the second conductive type emitter region and the first conductive type base region through a gate insulating film. The first gate electrode of the first and third MOSFET is formed on the surface of the first conductive type emitter region, the second conductive type emitter region, the first conductive type base region and the second conductive type base region through a gate insulating film.

Double gate semiconductor device and control device thereof

Horizontal deflection circuits are disclosed which permit high-frequency operation through use of conductivity modulation MOS FET devices. Distortion of the horizontal deflection coil voltage is avoided by inclusion of compensation means utilizing an inductance to produce delay in the increase in magnitude of current flow during reverse recovery current flow. Use of a compensation means including an inductor and diode in parallel combination provides additional benefits of oscillation suppression.

Growing community of inventors

Nagano, Japan

Akira Nishiura