Seiko Epson Corporation

Akira Morita

Yuichi Toriumi

Ryota Bansho

Takeshi Nomura

Akihiro Tomie

Chihiro Shin

Kota Mochizuki

Jun Ishida

Katsutoshi Ueno

Fukukai Ryu

Shinya Ukai

Yoshihito Miyashita

A control circuit couples a test capacitance element Cp and a node Test to a capacitance element Cm-to be tested, and applies a voltage output from an operational amplifier circuit to the capacitance elements Cm-and Cp and the node Test. Thereafter, the capacitance element Cp and the node Test are decoupled from the capacitance element Cm-to be tested, the capacitance element and the node Test are coupled to the capacitance element Cm-, the charge accumulated in the capacitance element Cm-is moved, a voltage Vref of a negative input-end (−) of a comparison circuit is set, and the capacitance element Cm-is tested based on a signal output from the comparison circuit.

Circuit device, electro-optical device, and electronic apparatus

A driver includes a first driving circuit and a second driving circuit. The second driving circuit includes a computation amplifier, an output capacitor, a first feedback capacitor, and a second feedback capacitor. The computation amplifier is composed of a transistor with a breakdown voltage lower than the breakdown voltage of a transistor making up the first driving circuit. The output capacitor is disposed between an output node of the computation amplifier and the signal supply line. The first feedback capacitor is disposed between an inverting input node of the computation amplifier and the signal supply line. One end of the second feedback capacitor is coupled to the inverting input node of the computation amplifier.

Driver, electrooptical device and electronic apparatus

A driver includes a first driving circuit and a second driving circuit. The second driving circuit includes a computation amplifier made up of a transistor with a breakdown voltage lower than a breakdown voltage of a transistor making up the first driving circuit, an output capacitor disposed between an output node of the computation amplifier and a signal supply line, and a first feedback capacitor disposed between an inverting input node of the computation amplifier and the signal supply line. The second driving circuit includes first to m-th voltage outputting capacitors including one end coupled to the inverting input node of the computation amplifier, and first to m-th voltage output circuits configured to output a voltage based on the gradation data to the other end of the first to m-th voltage outputting capacitors.

A driver includes a first driving circuit and a second driving circuit. The second driving circuit includes a computation amplifier, an output capacitor, a first feedback capacitor, and a second feedback capacitor. One end of the output capacitor is coupled to an output node of the computation amplifier, and the other end is coupled to the signal supply line. One end of the first feedback capacitor is coupled to an inverting input node of the computation amplifier, and the other end is coupled to the signal supply line. One end of the second feedback capacitor is coupled to the inverting input node of the computation amplifier, and the other end is coupled to a predetermined potential node. At least one of the first feedback capacitor and the second feedback capacitor is a capacitor with a variable capacitance value.

Driver having variable capacitance capacitor, electro-optical device and electronic apparatus

A display system includes a data processing unit and a liquid crystal panel. The data processing unit partitions display data pixels in one frame into, for example, blocks of four pixels in two rows×two columns, performs predetermined processing on display data of four display data pixels, and transmits processing data with an amount of data of ¼ pixels to the liquid crystal panel in four subframes. Panel pixels of the liquid crystal panel are partitioned into blocks of four pixels in two rows×two columns, data signals based on processing data are provided to four panel pixels included in one block in a subframe famong the four subframes, and of the four subframes, in subframes fto f, data signals based on the processing data are provided in a predetermined order to three of the panel pixels included in the one block.

Display system having data processing unit to partition display data pixels

A driver includes a data voltage output terminal, a capacitor drive circuit that outputs each of first to n-th capacitor drive voltages corresponding to gradation data to a respective one of first to n-th capacitor driving nodes, a capacitor circuit including first to n-th capacitors each provided between an output node and a respective one of the first to n-th capacitor driving nodes, a processing circuit that generates a correction signal for correcting a voltage difference between an output voltage and a target voltage corresponding to the gradation data, and a correction circuit that corrects the voltage difference with a correction voltage corresponding to the voltage difference by injecting a charge corresponding to the correction signal into the output node or discharging the charge from the output node by using the correction capacitor circuit.

Driver, electro-optical device, and electronic apparatus

An integrated circuit includes a capacitance element to be tested and a test circuit in the same semiconductor substrate, the test circuit includes a capacitance element for testing, and a comparison circuit for comparing a voltage of a node with a voltage of a signal, electrically connects another end of the capacitance element to be tested to the node, applies the voltage of the signal to the node in a first period, changes the voltage of the node based on a capacitance ratio of the capacitance element to be tested and the capacitance element for testing, and tests a capacity size of the capacitance element to be tested based on a comparison result of the comparison circuit in a second period after the first period.

Integrated circuit and display device

A circuit device configured to drive an electro-optical panel including a demultiplexer provided between a first to n-th data lines, n being an integer of three or greater, and a data signal supply line, includes a data line driving circuit configured to output a data signal to the data signal supply line, and a processing circuit configured to set a selection order, by the demultiplexer, of the first to n-th data lines. When an i-th data line, i being an integer of 1 to n, is selected j-th, j being an integer of 1 to n, in the first selection order, the processing circuit sets a second selection order using random number information so as to prohibit the i-th data line from being selected j-th in the second selection order.

A circuit device includes a transfer gate and a control circuit. The transfer gate includes a P-type transistor and an N-type transistor. The control circuit sets, as a first value, a transistor size ratio that is a ratio of a size of the P-type transistor to a size of the N-type transistor when a voltage of an input signal to the transfer gate is in a first voltage range at a timing at which the transfer gate is turned off. The control circuit sets the transistor size ratio as a second value greater than the first value when a voltage of the input signal is in a second voltage range lower than that in the first voltage range at a timing at which the transfer gate is turned off.

A circuit device includes a first input terminal, a second input terminal, a reception circuit including a non-inverted input terminal and an inverted input terminal, a first signal line electrically coupling a non-inverted input terminal of the reception circuit and the first input terminal and having a first coupling node and a second coupling node, a second signal line electrically coupling an inverted input terminal of the reception circuit and the second input terminal and having a third coupling node and fourth coupling node, a first variable capacitance circuit having an end coupled to the first coupling node and another end coupled to the second coupling node, and a second variable capacitance circuit having an end coupled to the third coupling node and another end coupled to the fourth coupling node.

A circuit device includes a transfer gate, a charge compensation circuit, and a control circuit. The control circuit controls the charge compensation circuit. The charge compensation circuit discharges charge from an output node of the transfer gate when a voltage of an input signal to the transfer gate is in a first voltage range at a timing at which the transfer gate is turned off. The charge compensation circuit injects charge into the output node of the transfer gate when a voltage of the input signal to the transfer gate is in a second voltage range lower than that in the first voltage range at a timing at which the transfer gate is turned off.

A circuit device includes a driving circuit and an output capacitor. The output capacitor includes a first MIM capacitor element including a first metal layer, a second metal layer, and a first insulating layer, and a second MIM capacitor element including a third metal layer, a fourth metal layer, and a second insulating layer. The first metal layer and the fourth metal layer are electrically coupled to the capacitor drive node, and the second metal layer and the third metal layer are electrically coupled to the voltage output node. The second metal layer is positioned at the third metal layer side with respect to the first metal layer, and the third metal layer is positioned at the second metal layer side with respect to the fourth metal layer.

Circuit device, electro-optical device, and electronic apparatus having plural capacitor elements

A display driver includes a processing circuit configured to output display data, a D/A conversion circuit configured to D/A-convert the display data output from the processing circuit, a data voltage output terminal, and an amplifier circuit configured to output a data voltage to the data voltage output terminal on the basis of a D/A conversion result output from the D/A conversion circuit. In a pre-charge period, the processing circuit outputs first pre-charge data as pre-charge data for a D/A conversion circuit DACi, and outputs second pre-charge data different from the first pre-charge data as pre-charge data for a D/A conversion circuit DACj.

Display driver, electro-optical device, and electronic apparatus

A display driver includes a driving circuit including an amplifier circuit and configured to cause the amplifier circuit to output a data voltage corresponding to display data, a reference voltage generation circuit configured to generate a reference voltage supplied to a reference current source of the amplifier circuit and output the reference voltage to an output node, and a setting circuit configured to set a voltage of the output node of the reference voltage generation circuit. The setting circuit includes a capacitor having one end connected with the output node, and a control circuit configured to control a voltage of another end of the capacitor based on an enable signal to change a voltage of the output node from a first voltage at which a reference current flowing in the reference current source is off, toward the reference voltage.

Display driver, circuit device, electro-optical device, and electronic apparatus

A display driver includes a D/A converter circuit for outputting a gradation voltage, and an amplifier circuit that is input with a gradation voltage at an input node. The amplifier circuit includes an operational amplifier, resistance provided between the input node and a node, resistance provided between a node and an output node of the operational amplifier, and an adjustment resistance circuit. The adjustment resistance circuit adjusts a first adjustment resistance value, that is a resistance value between a node and an inverting input node of the operational amplifier, and a second adjustment resistance value, that is a resistance value between the node and the inverting input node.

Growing community of inventors

Suwa, Japan

Akira Morita