Panasonic Corporation

Akira Miyoshi

Nobuo Higaki

Keizo Sumida

Toru Morikawa

A processor which executes positive conversion processing, which converts coded data into uncoded data, and saturation calculation processing, which rounds a value to an appropriate number of bits, at high speed. When a positive conversion saturation calculation instruction 'MCSST Dis decoded, the sum-product result registeroutputs its held value to the path PThe comparatorcompares the magnitude of the held value of the sum-product result registerwith the coded 32-bit integer '0x0000_00FF'. The polarity judging unitjudges whether the eighth bit of the value held by the sum-product result registeris &#x201c;ON'. The multiplexeroutputs one of the maximum value &#x201c;0x0000_00FF&#x201d; generated by the constant generatorthe zero value &#x201c;0x0000_0000&#x201d; generated by the zero generatorand the held value of the sum-product result registerto the data bus

Processor which can favorably execute a rounding process composed of positive conversion and saturated calculation processing

A processor which executes positive conversion processing, which converts coded data into uncoded data, and saturation calculation processing, which rounds a value to an appropriate number of bits, at high speed. When a positive conversion saturation calculation instruction 'MCSST D' is decoded, the sum-product result registeroutputs its held value to the path P. The comparatorcompares the magnitude of the held value of the sum-product result registerwith the coded 32-bit integer '0x0000_00FF'. The polarity judging unitjudges whether the eighth bit of the value held by the sum-product result registeris &#x201c;ON&#x201d;. The multiplexeroutputs one of the maximum value &#x201c;0x0000_00FF&#x201d; generated by the constant generator, the zero value &#x201c;0x0000_0000&#x201d; generated by the zero generator, and the held value of the sum-product result registerto the data bus

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Kadoma, Japan

Akira Miyoshi