Kabushiki Kaisha Yaskawa Denki

Akira Kumagae

Kenji Yamada

Katsutoshi Yamanaka

Takaaki Terada

In a three-level neutral point clamping type inverter circuit which includes a positive bus line (,), a negative bus line (,) and a neutral line (,), wherein first and second IGBTs (,), (,) are connected in series between the positive bus line (,) and a phase voltage output terminal (,) and third and fourth IGBTs (,), (,) are connected in series between the negative bus line (,) and the phase voltage output terminal (,), the three-level neutral point clamping type inverter circuit further includes a first snubber capacitor (,) provided between the positive bus line (,) and the neutral line (,), a second snubber capacitor (,) provided between the negative bus line (,) and the neutral line (,), a first snubber diode (,) having a cathode coupled to the positive bus line (,) and an anode coupled to the phase voltage output terminal (,), and a second snubber diode (,) having an anode coupled to the negative bus line (,) and a cathode coupled to the phase voltage output terminal (,).

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Fukuoka, Japan

Akira Kumagae