Toyota Jidosha Kabushiki Kaisha

Nippondenso Co., Ltd.

Toyota Jidosha Kogyo Kabushiki Kaisha

Osaka University

Akira Kawahashi

Yasuo Takahashi

Masahiro Sugimoto

Akinori Seki

Masakatsu Maeda

Hiroshi Arai

Sei Iguchi

Hiroaki Sasaki

Hisatoshi Ohta

Katsuhiko Nishiwaki

Hajime Itoh

Kazuhide Makita

Yoshiharu Mineo

Testuya Inoue

Masahiro Inazu

An ohmic electrode for a p-type SiC semiconductor, and a method of forming the ohmic electrode. The ohmic electrode has an ohmic electrode layer, which has an amorphous structure and which is made of a TiSiCternary film of which a composition ratio is within a composition range that is surrounded by two lines and two curves expressed by an expression x=0 (0.35&#x2266;y&#x2266;0.5), an expression y=&#x2212;1.120x+0.5200 (0.1667&#x2266;x&#x2266;0.375), an expression y=1.778(x&#x2212;0.375)+0.1 (0&#x2266;x&#x2266;0.375) and an expression y=&#x2212;2.504x&#x2212;0.5828x+0.5 (0&#x2266;x&#x2266;0.1667) and that excludes the line expressed by the expression x=0. The ohmic layer is directly laminated on a surface of a p-type SiC semiconductor.

Ohmic electrode and method of forming the same

A manufacturing method of a semiconductor device including an electrode having low contact resistivity to a nitride semiconductor is provided. The manufacturing method includes a carbon containing layer forming step of forming a carbon containing layer containing carbon on a nitride semiconductor layer, and a titanium containing layer forming step of forming a titanium containing layer containing titanium on the carbon containing layer. A complete solid solution Ti (C, N) layer of TiN and TiC is formed between the titanium containing layer and the nitride semiconductor layer. As a result, the titanium containing layer comes to be in ohmic contact with the nitride semiconductor layer throughout the border therebetween.

Semiconductor device and manufacturing method of semiconductor device

A method of forming an Ohmic contact on a P-type 4H&#x2014;SiC and an Ohmic contact formed by the same are provided. A method of forming an Ohmic contact on a P-type 4H&#x2014;SiC substrate including a deposition step of successively depositing a 1 to 60 nm thick first Al layer, Ti layer, and second Al layer on a P-type 4H&#x2014;SiC substrate and an alloying step of forming an alloy layer between the SiC substrate and the Ti layer through the first Al layer by heat treatment in a nonoxidizing atmosphere. An Ohmic contact on a P-type 4H&#x2014;SiC substrate formed by this method is also provided.

Method of forming an OHMIC contact on a P-type 4H-SIC substrate

A method is set forth of forming an ohmic electrode having good characteristics on a SiC semiconductor layer. In the method, a Ti-layer and an Al-layer are formed on a surface of the SiC substrate. The SiC substrate having the Ti-layer and the Al-layer is maintained at a temperature that is higher than or equal to a first temperature and lower than a second temperature until all Ti in the Ti-layer has reacted with Al. The first temperature is the minimum temperature of a temperature zone at which the Ti reacts with the Al to form AlTi, and the second temperature is the minimum temperature of a temperature zone at which the AlTi reacts with SiC to form TiSiC. As a result of this maintaining of temperature step, an AlTi-layer is formed on the surface of the SiC substrate. The method also comprises further heating the SiC substrate having the AlTi-layer to a temperature that is higher than the second temperature. As a result of this step of further heating the SiC substrate reacts with AlTi of the AlTi-layer to form a TiSiC-layer on the surface of the SiC substrate.

Semiconductor devices and manufacturing method thereof

A semiconductor device is formed such that a contact surface between a p-type high-concentration semiconductor region and an n-type high-concentration buffer region assumes a convexo-concave shape. This makes it possible to enlarge an area of the contact surface between the p-type high-concentration semiconductor region and the n-type high-concentration buffer region. As a result, holes are injected into an n-type low-concentration drift region from the p-type high-concentration semiconductor region with higher efficiency and with a less voltage drop between the pn-junction. Thus, effects of conductivity modulation can be achieved sufficiently and the on-resistance and the voltage drop of an IGBT can be lowered.

Insulated gate semiconductor device with high minority carrier injection and low on-voltage by enlarged pn-junction area

An azimuth determinating apparatus wherein the azimuth sensor is oriented to a specified direction, and the deviation of the two-component detection signals of the azimuth sensor from the pointing direction of the azimuth sensor are corrected by the adjustment of the two-component detection signals with the adjusting circuit in accordance with the indication on the amount of deviation indicated by the indicating circuit, whereby distortion of the output signals due to the residual magnetism of the azimuth sensor is corrected and the true azimuth can be determined.

Azimuth determinating apparatus

Growing community of inventors

Komaki, Japan

Akira Kawahashi