Fujitsu Semiconductor Limited

Fujitsu Microelectronics Limited

Socionext Inc.

Fujitsu Corporation

Akira Katakami

Naoyoshi Tamura

Akiyoshi Hatada

Yosuke Shimamune

Masashi Shima

Hiroyuki Ohta

Masahiro Fukuda

Young Suk Kim

Takashi Sakuma

Eiji Yoshida

Kazuo Kawamura

Masaki Haneda

Kazuya Okubo

Yuka Kase

Takayuki Aoyama

A semiconductor device includes a gate electrode formed on a silicon substrate via a gate insulation film in correspondence to a channel region, source and drain regions of a p-type diffusion region formed in the silicon substrate at respective outer sides of sidewall insulation films of the gate electrode, and a pair of SiGe mixed crystal regions formed in the silicon substrate at respective outer sides of the sidewall insulation films in epitaxial relationship to the silicon substrate, the SiGe mixed crystal regions being defined by respective sidewall surfaces facing with each other, wherein, in each of the SiGe mixed crystal regions, the sidewall surface is defined by a plurality of facets forming respective, mutually different angles with respect to a principal surface of the silicon substrate.

Semiconductor device and fabrication method thereof

A first well in a first conductivity type which is formed at a first region and is electrically connected to a first power supply line, a second well in a second conductivity type being an opposite conductivity type of the first conductivity type which is formed at a second region and is electrically connected to a second power supply line, a third well in the second conductivity type which is integrally formed with the second well at a third region adjacent to the second region, a fourth well in the first conductivity type integrally formed with the first well at a fourth region adjacent to the first region, a fifth well in the first conductivity type which is formed at the third region to be shallower than the third well, and a sixth well in the second conductivity type which is formed at the fourth region to be shallower than the fourth well, are included.

Semiconductor device and manufacturing method thereof

A semiconductor device includes a gate insulation film formed over a semiconductor substrate; a cap film formed over the gate insulation film; a silicon oxide film formed over the cap film; a metal gate electrode formed over the silicon oxide film; and source/drain diffused layers formed in the semiconductor substrate on both sides of the metal gate electrode.

Semiconductor device and semiconductor device manufacturing method

A semiconductor device includes a semiconductor substrate, a device region including first and second parts, first and second gate electrodes formed in the first and the second parts, first and second source regions, first and second drain regions, first, second, third, and fourth embedded isolation film regions formed under the first source, the first drain, the second source, and the second drain regions, respectively. Further, the first drain region and the second source region form a single diffusion region, the second and the third embedded isolation film regions form a single embedded isolation film region, an opening is formed in a part of the single diffusion region so as to extend to the second and the third embedded isolation film regions, and the opening is filled with an isolation film.

Semiconductor device and manufacturing method of the semiconductor device

A first p-type SiGe mixed crystal layer is formed by an epitaxial growth method in a trench, and a second p-type SiGe mixed crystal layer is formed. On the second SiGe mixed crystal layer, a third p-type SiGe mixed crystal layer is formed. The height of an uppermost surface of the first SiGe mixed crystal layer from the bottom of the trench is lower than the depth of the trench with the surface of the silicon substrate being the standard. The height of an uppermost surface of the second SiGe mixed crystal layer from the bottom of the trench is higher than the depth of the trench with the surface of the silicon substrate being the standard. Ge concentrations in the first and third SiGe mixed crystal layers are lower than a Ge concentration in the second SiGe mixed crystal layer.

Semiconductor device and method of manufacturing the same

A semiconductor device includes a first device isolation insulating film formed in a semiconductor substrate, a first well having a first conductivity type, defined by the first device isolation insulating film, and shallower than the first device isolation insulating film, a second device isolation insulating film formed in the first well, shallower than the first well, and defining a first part of the first well and a second part of the first well, a gate insulating film formed above the first part, a gate electrode formed above the gate insulating film, and an interconnection electrically connected to the second part of the first well and the gate electrode, wherein an electric resistance of the first well in a first region below the second device isolation insulating film is lower than an electric resistance of the first well in a second region other than the first region on the same depth level.

Semiconductor device and method of manufacturing semiconductor device

A method of fabricating a semiconductor device is disclosed that is able to suppress a short channel effect and improve carrier mobility. In the method, trenches are formed in a silicon substrate corresponding to a source region and a drain region. When epitaxially growing p-type semiconductor mixed crystal layers to fill up the trenches, the surfaces of the trenches are demarcated by facets, and extended portions of the semiconductor mixed crystal layers are formed between bottom surfaces of second side wall insulating films and a surface of the silicon substrate, and extended portion are in contact with a source extension region and a drain extension region.

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Kawasaki, Japan

Akira Katakami