Alps Electric Co., Ltd.

Alps Alpine Co., Ltd.

Akira Asao

Kiyoshi Sasai

Tomoyuki Sawataishi

Tatsumi Fujiyoshi

Takeo Suzuki

Junichi Saito

Shinya Yokoyama

Akihisa Iikura

Shuji Yanagi

Toshiyuki Oki

Kimihiro Nakao

Takuya Watanabe

In a sine-wave multiplier, signal components included in an output signal Quand corresponding to the product of a third-order harmonic component of a first square wave Wand an input signal Vi and the product of a fifth-order harmonic component of the first square wave Wand the input signal Vi are offset by a signal component included in an output signal Quand corresponding to the product of a fundamental component of a second square wave Wand the input signal Vi and a signal component included in an output signal Quand corresponding to the product of a fundamental component of a second square wave Wand the input signal Vi.

Sine-wave multiplier and input device including the same

A differential signal is input to a pair of gates of a differential pair, a differential signal generated by a load circuit connected to drains of the differential pair is amplified by a differential amplifier stage, and the amplified differential signal is fed back to a pair of sources of the differential pair via a feedback circuit. It is possible to maintain a high input impedance in the pair of gates of the differential pair while not being influenced by a gain of negative feedback of an amplifier circuit, and it is possible to perform amplification in an input stage by using a pair of a first transistor and a second transistor of the differential pair. Therefore, compared with the related art, it is possible to decrease the number of transistors in the input stage and to reduce a flicker noise.

Amplifier circuit

In a reset period of a first stage, a switching circuit is turned on, and high-level driving voltages are output from driving circuits. In a charge transfer period subsequent to the reset period, the switching circuit is turned off, and low-level driving voltages are output from the driving circuits. It is determined whether or not an output voltage of an amplifier circuit in the charge transfer period is included in a normal range. In the inspection of a second stage subsequent to the first stage, in the same manner as in the normal measurement, voltages having opposite phases are output from the driving circuits in the reset period and the charge transfer period, and it is determined whether or not the output voltage of the amplifier circuit in the charge transfer period is included in a normal range.

Inspection method of sensor device and sensor device

The highest voltage of a power supply voltage, a ground potential, and a signal voltage is output as a selection voltage from a terminal on the output side. In this case, terminals on the input side and the terminal on the output side are connected to each other through MOS transistors in the ON state. Therefore, it is possible to suppress a voltage drop due to a parasitic diode of each MOS transistor.

Voltage selection circuit and semiconductor integrated circuit device having the same

A protection circuit includes a power supply terminal, a ground terminal, a control unit connected to the power supply terminal and the ground terminal, and a supply unit connected to the power supply terminal and the ground terminal, for preventing application of voltage in a reverse direction to a circuit unit having a predetermined function. In this case, the control unit generates a control potential, which controls the control unit and the supply unit in accordance with a potential supplied from the power supply terminal and a potential supplied from the ground terminal. The supply unit is configured to be capable of supplying current to a circuit unit connected to a subsequent stage on the basis of a potential supplied from the power supply terminal, a potential supplied from the ground terminal, and the control potential generated by the control unit.

Protection circuit

A balanced gain control amplifier contains first and second transistors differentially connected to each other and having their emitters connected to a first current source. The balanced gain control amplifier also contains third and fourth transistors differentially connected to each other and having their emitters connected to a second constant current source. The collectors of the first and fourth transistors are connected to a power terminal through a common first load resistor, and the collectors of the second and third transistors are connected to the power terminal through a common second load resistor. A signal may be input between the bases of the first and third transistors and the bases of the second and fourth transistors. The current of the second constant current source is variable in a range no more than the current value of the first constant current source.

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Miyagi-ken, Japan

Akira Asao