Seiko Epson Corporation

Akinori Shindo

Masatoshi Tagaki

Hideaki Kurita

Terunao Hanaoka

Yasuo Yamasaki

Seiichi Chiba

Toshiyuki Enta

Shuji Kojima

Michiyoshi Takano

An electronic component includes: a semiconductor element including a circuit; a vibration element; a first electrode arranged on a first surface of the semiconductor element and connected to the circuit and the vibration element arranged on the first surface side; a second electrode arranged on the first surface; a first wiring board including a first wire connected to the second electrode; and a second wiring board including a second wire to which the first wire is connected. At least a part of an inner side region of an outer contour of the vibration element is arranged to overlap the second electrode in plan view facing the first surface.

Electronic component, electronic device, and method of manufacturing the electronic component

A sensor device includes a first electrode disposed on active surface side of a silicon substrate, an external connecting terminal electrically connected to the first electrode, at least one stress relaxation layer disposed between the silicon substrate and the external connecting terminal, a connecting terminal disposed on the active surface side of the silicon substrate, and a vibration gyro element having weight sections as mass adjustment sections, the vibration gyro element is held by the silicon substrate due to connection between the connection electrode and the external connecting terminal, and a meltage protection layer formed in an area where the stress relaxation layer and the mass adjustment section overlap each other in a plan view is provided.

Sensor device, motion sensor, and electronic device

A semiconductor device comprising: a semiconductor layer including an element formation region, and first and second spaced apart isolation regions; an element in the element formation region; an interlayer dielectric layer above the semiconductor layer; an electrode pad above the interlayer dielectric layer; a passivation layer above the electrode pad and having an opening which exposes part of the electrode pad; and a bump in the opening and covering part of the element when viewed from a top side, the bump including a first edge when viewed from the top side, the first isolation region being formed in a first region, the first region including a first specific distance outward from a first line directly below the first edge of the bump, the second isolation region being formed in a second region, the second region including a second specific distance inward from the first line.

Semiconductor device having active element formation region provided under a bump pad

A semiconductor device including: a semiconductor layer including an active region and an isolation region provided around the active region; an element formed in the active region; an interlayer dielectric formed above the semiconductor layer; and an electrode pad formed above the interlayer dielectric and having a rectangular planar shape having a short side and a long side, the electrode pad at least partially covering the element when viewed from a top side, and the semiconductor layer positioned in a specific range outward from a line extending vertically downward from the short side of the electrode pad being a forbidden region.

Semiconductor device

A semiconductor device including: a semiconductor layer; an electrode pad provided above the semiconductor layer; an insulating layer provided above the electrode pad and having an opening which exposes at least part of the electrode pad; and a metal electrode provided at least in the opening and including a first portion provided above the electrode pad, and a second portion provided above part of the insulating layer positioned outside the electrode pad, an area of a top surface of the second portion being larger than an area of a top surface of the first portion.

Semiconductor device and semiconductor chip

A semiconductor device including: a semiconductor layer; a transistor formed in the semiconductor layer and including a gate insulating layer and a gate electrode, the transistor being a high voltage transistor in which an insulating layer having a thickness greater than the thickness of the gate insulating layer is formed under an end portion of the gate electrode; an interlayer dielectric formed above the transistor; and an electrode pad formed above the interlayer dielectric and positioned over at least part of the gate electrode when viewed from a top side.

A semiconductor device comprises: an insulation layer located on or above a semiconductor element; a conductive pad formed on the insulation film; and a first opening pattern formed on the conductive pad.

Semiconductor device and method of manufacturing a semiconductor device

Making the relative size of the surface area of a bump electrode at a portion in contact with an under electrode larger than the surface area of a base of a hole increases the contact surface area between the lower surface of the bump electrode and a polyimide layer. As a result, effect by the polyimide layer to mitigate the impact loads applied during bonding greatly increases. The impact loads applied during bonding can also be mitigated by using a material for the conductive layer that is as flexible as, or even more flexible than, the material of the bump electrode. It is therefore possible to reduce cracks in semiconductor chips or the like directly under the bump electrode more efficiently.

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Hokuto, Japan

Akinori Shindo