Tohoku University

Foundation for Advancement of International Science

Other

Adv Antest Corporation

Yazaki Corporation

Shinkawa Ltd.

Canon Kabushiki Kaisha

Tokyo Electron Limited

Nippon Shokubai Co., Ltd.

Zeon Corporation

Shin-Etsu Handotai Co., Ltd.

Toshiba Mitsubishi-Electric Industrial Systems Corporation

Ulvac, Inc.

Mitsui Engineering and Shipbuilding Company Limited

Stella Chemifa Corporation

Akinobu Teramoto

Tadahiro Ohmi

Shigetoshi Sugawa

Hiroshi Akahori

Rihito Kuroda

Toshiyuki Okayasu

Keiichi Nii

Tomoyuki Suwa

Toru Maeda

Akihiro Morimoto

Takanori Watanabe

Yoshinobu Shiba

Hiroshi Miyagi

Hirokazu Matsumoto

Hideo Kudo

Akira Nishimura

Shinichi Nishimura

Kensuke Watanabe

Tatsuya Sugimoto

Toshiro Yamada

Yoshihito Yamada

Masayuki Miyashita

Yoshinori Hayamizu

Tetsuya Utano

Takashi Abe

Takehisa Saito

Kimiaki Tanaka

Masaaki Oda

Takenao Nemoto

Yugo Tomita

Rui Hasebe

Xun Gu

Fusao Fujita

Yukio Hayakawa

Kazufumi Watanabe

Koutaro Tanaka

Cheng Weitao

Sumio Sano

Tetsuro Tanikawa

Akihide Shirotori

Takefumi Nishimuta

Hiroshi Yamauchi

Hiroshi Imai

Kohei c/o Tokyo Electron At Ltd Kawamura

Yasuo c/o Tokyo Electron At Ltd Kobayashi

A method for preparing a silicon nitride film with a high deposition rate and a reduced damage to the substrate and/or the underlying layer formed under the silicon nitride film. The method for preparing a silicon nitride film contains the steps of irradiating a nitride with an ultraviolet light, and contacting the nitride irradiated with the ultraviolet light and a hydrogenated cyclic silane represented by a general formula SiH, wherein n is 5, 6, or 7.

Method for producing silicon nitride film

A method of forming a nitride film wherein (a) a silane-based gas is supplied to a processing chamber through a gas supply port; (b) a nitrogen radical gas from a radical generator is supplied to the processing chamber through a radical gas pass-through port; and (c) the silane-based gas supplied in (a) is reacted with the nitrogen radical gas supplied in (b), without causing a plasma phenomenon in the processing chamber, to form a nitride film on a wafer.

Method of forming nitride film

Provided are a semiconductor device and semiconductor-device manufacturing method that make it possible to improve the contact between an insulating film and a wiring member and the reliability thereof. This method for manufacturing a semiconductor device () includes a step in which a CF film () is formed on top of a semiconductor substrate (), a step in which grooves (C) corresponding to a wiring pattern (P) are formed in the CF film (), and a step in which a copper wiring member () is embedded in the grooves (C).

Wiring structure having interlayer insulating film and wiring line without a barrier layer between

In a silicon wafer which has a surface with a plurality of terraces formed stepwise by single-atomic-layer steps, respectively, no slip line is formed.

Surface treatment method for atomically flattening a silicon wafer and heat treatment apparatus

A gate insulating film of a conventional semiconductor device is subjected to dielectric breakdown at a low electric field strength and thus its service life is short. This is because since the size of the asperity of at least one of a semiconductor layer-side interface and an electrode-side interface is large and, an electric field applied to the gate insulating film is locally concentrated and has a variation in its strength. This problem is solved by specifying the sizes of the asperities of both interfaces of the gate insulating film.

Semiconductor device and method of manufacturing the same

A cause of deteriorating the hydrogen termination on the surface of a wafer is found to be water adsorbed on the surface. By exposing the wafer to an inert gas atmosphere containing an Hgas so as to suppress the oxidation reaction due to the water, it is possible to improve the hydrogen termination on the wafer surface.

Method of manufacturing semiconductor device and semiconductor manufacturing apparatus

An accumulation mode transistor has an impurity concentration of a semiconductor layer in a channel region at a value higher than 2&#xd7;10cmto achieve a large gate voltage swing.

Transistor and semiconductor device

A transistor capable of adjusting a threshold value is obtained by adjusting an impurity concentration of a silicon substrate supporting an SOI layer and by controlling a thickness of a buried insulating layer formed on a surface of the silicon substrate in contact with the SOI layer.

Semiconductor device

On a surface of a semiconductor substrate, a plurality of terraces formed stepwise by an atomic step are formed in the substantially same direction. Using the semiconductor substrate, a MOS transistor is formed so that no step exists in a carrier traveling direction (source-drain direction).

Semiconductor substrate and semiconductor device

A silicon carbide substrate has a high-frequency loss equal to or less than 2.0 dB/mm at 20 GHz is effective to mount and operate electronic components. The silicon carbide substrate is heated at 2000&#xb0; C. or more to be reduced to the high-frequency loss equal to 2.0 dB/mm or less at 20 GHz. Moreover, manufacturing the silicon carbide substrate by CVD without flowing nitrogen into a heater enables the high-frequency loss to be reduced to 2.0 dB/mm or less.

Silicon carbide substrate, semiconductor device, wiring substrate, and silicon carbide manufacturing method

In a semiconductor device, the degree of flatness of 0.3 nm or less in terms of a peak-to-valley (P-V) value is realized by rinsing a silicon surface with hydrogen-added ultrapure water in a light-screened state and in a nitrogen atmosphere and a contact resistance of 10&#x3a9;cmor less is realized by setting a work function difference of 0.2 eV or less between an electrode and the silicon. Thus, the semiconductor device can operate on a frequency of 10 GHz or higher.

Metal nanoink () for bonding an electrode of a semiconductor die and an electrode of a substrate and/or bonding an electrode of a semiconductor die and an electrode of another semiconductor die by sintering under pressure is produced by injecting oxygen into an organic solvent () in the form of oxygen nanobubbles () or oxygen bubbles () either before or after metal nanoparticles () whose surfaces are coated with a dispersant () are mixed into the organic solvent (). Bumps are formed on the electrode of the semiconductor die and the electrode of the substrate by ejecting microdroplets of the metal nanoink () onto the electrodes, the semiconductor die is turned upside down and overlapped in alignment over the substrate, and then, the metal nanoparticles of the bumps are sintered under pressure by pressing and heating the bumps between the electrodes. As a result, generation of voids during sintering under pressure is minimized.

Metal nanoink and process for producing the metal nanoink, and die bonding method and die bonding apparatus using the metal nanoink

A MIS transistor, formed on a semiconductor substrate, assumed to comprise a semiconductor substrate () comprising a projecting part (B) with at least two different crystal planes on the surface on a principal plane, a gate insulator (B) for covering at least a part of each of said at least two different crystal planes constituting the surface of the projecting part, a gate electrode (B), comprised on each of said at least two different crystal planes constituting the surface of the projecting part, which sandwiches the gate insulator with the said at least two different planes, and a single conductivity type diffusion region () formed in the projecting part facing each of said at least two different crystal planes and individually formed on both sides of the gate electrode. Such a configuration allows control over increase in the element area and increase of channel width.

MIS transistor and CMOS transistor

A multilayered circuit board which is provided with a low-permittivity interlayer insulating film, and which can significantly improve the performance such as signal transmission characteristics of the multilayered circuit board such as a package and a printed board, because the surface in contact with the interlayer insulating film of the circuit board has no unevenness to eliminate the lowering of production yield and the deterioration of high-frequency signal transmission characteristics; and electronic equipment using the circuit board. The multilayered circuit board comprises, mounted on a substrate, plural wiring layers and plural insulating layers positioned between the plural wiring layers, wherein at least part of the plural insulating layers are composed of a porous insulating layer containing at least any of materials selected from a porous material group consisting of porous material, aerogel, porous silica, porous polymer, hollow silica and hollow polymer, and a non-porous insulating layer formed on at least one surface of the porous insulating layer and not containing the porous material group.

Multilayer circuit board and electronic device

A plasma processing apparatus in which consumption of expensive krypton and xenon gases is suppressed as much as possible while reducing damage on a workpiece during plasma processing. In plasma processing of a substrate using a rare gas, two or more kinds of different rare gases are employed, and an inexpensive argon gas is used as one rare gas and any one or both of krypton and xenon gases having a larger collision cross-sectional area against electron than that of the argon gas is used as the other gas. Consequently, consumption of expensive krypton and xenon gases is suppressed as much as possible and damage on a workpiece is reduced during plasma processing.

Plasma processing method and plasma processing apparatus

Growing community of inventors

Miyagi, Japan

Akinobu Teramoto