Socionext Inc.

Fujitsu Semiconductor Limited

Akimitsu Tajima

Hideaki Kondo

Takeshi Kimura

Yuma Yano

Hiroto Kodama

Osamu Moriwaki

Kengo Komiya

The voltage hold circuit is a voltage hold circuit configured to operate every processing cycle, the processing cycle including a hold period and a reset period following the hold period, and hold a voltage value for an input voltage signal, the voltage hold circuit including: a first hold circuit configured to operate to hold a minimum voltage value for the input voltage signal in the hold period every the processing cycle; and a second hold circuit configured to operate to hold a maximum voltage value for the input voltage signal in the reset period every the processing cycle.

Voltage hold circuit, voltage monitoring circuit, and semiconductor integrated circuit

A peak/bottom detection circuit is disclosed. A comparator compares a voltage of one of three or more capacitors with an input voltage. A calculation amplifier amplifies the voltage of one of the three or more capacitors. Each of three or more switches respectively corresponding to the three or more capacitors connects a corresponding capacitor among the three or more capacitors to one of the comparator, the calculation amplifier, and a source of the input voltage. A controller generates control signals for sequentially switching connection destinations of the three or more capacitors and to supply the control signals to the three or more switches, respectively, in which the connection destinations of three capacitors among the three or more capacitors are different from each other.

Peak/bottom detection circuit, A/D converter, and integrated circuit

In a constant voltage circuit including: an error amplifier circuit amplifying a difference voltage between an output voltage and a reference voltage; and an output transistor controlling the output voltage based on an output of the error amplifier circuit, a voltage proportional to a leakage current detected by a monitoring transistor is generated by an oscillation circuit and a charge pump circuit and is supplied to a back gate of the output transistor.

Constant voltage circuit

A power supply has first and second reference voltage sources; a step-down voltage generator, including a transistor supplied with a first voltage, a resistor string between the transistor and a second voltage, and an op-amp which controls the transistor, and outputting the voltage at a first node among nodes in the resistor string; switches, coupled to the nodes; a comparison circuit, which compares the voltage at a common node the switches coupling in common with the second reference voltage source; and a calibration control circuit, which selects any switch according to a comparison result to calibrate. During calibration, the calibration control circuit couples a second node among the nodes to a non-inverting terminal of the op-amp, and the first reference voltage source to an inverting terminal of the op-amp, and after calibration, couples the common node to the non-inverting terminal, and the second reference voltage source to the inverting terminal.

Step-down power supply circuit

The integrated circuit device includes: an electrostatic protection circuit that is provided between first and second power supply lines coupled to external terminals respectively, and forms a current pathway between the first and second power supply lines during a given period in response to an increase in a voltage between the first and second power supply lines; and a power supply generating circuit that performs power supply control based on a voltage of the first power supply line and generates a control signal in accordance with a switching timing of the power supply control. And, the electrostatic protection circuit includes an adjustment circuit for shortening the given period in response to the control signal.

Growing community of inventors

Yokohama, Japan

Akimitsu Tajima