Sony Semiconductor Solutions Corporation

Sony Corporation

Sony Group Corporation

Nagase Diagnostics Co., Ltd.

Akiko Honjo

Hideshi Abe

Hiroaki Ammo

Shiro Uchida

Hirokazu Ejiri

Tomomasa Watanabe

Ken Sawada

Shinya Yamakawa

Shota Konno

Yuki Ueda

A solid-state imaging element according to the present disclosure includes: a first semiconductor substrate that includes a floating diffusion that temporarily holds an electric signal output from a photoelectric conversion element; and a second semiconductor substrate that faces the first semiconductor substrate, in which the second semiconductor substrate includes a first transistor disposed on a side facing the first semiconductor substrate, the first transistor including: a channel extending along a thickness direction of the second semiconductor substrate; and a multi-gate extending along the thickness direction of the second semiconductor substrate and sandwiching the channel, and the multi-gate of the first transistor is connected to the floating diffusion.

Solid-state imaging element and video recording apparatus

A solid-state image pickup apparatus according to a first aspect of the present technology includes a photoelectric conversion section that generates and holds a charge in response to incident light, a transfer section that includes a V-NW transistor (Vertical Nano Wire transistor) and transfers the charge held in the photoelectric conversion section, and an accumulation section that includes a wiring layer connected to a drain of the transfer section including the V-NW transistor and accumulates the charge transferred by the transfer section. The present technology is applicable to a CMOS image sensor, for example.

Solid-state image pickup apparatus and electronic equipment

Provided is a thin film transistor, including: a base that includes, on an upper surface, a first region and a second region; a gate electrode that is provided on the first region of the base; a gate insulating film that is provided on a surface of the gate electrode and the second region of the base; and a semiconductor layer that is provided on a surface of the gate insulating film, wherein the semiconductor layer includes a third region and a fourth region, in the third region, the semiconductor layer and the gate electrode face with a minimum interval, in the fourth region, a distance from the semiconductor layer to the gate electrode is larger than the minimum interval, and at a boundary position between the third region and the fourth region, the semiconductor layer forms a linear shape or a substantially linear shape.

Bottom-gate TFT including gate sidewall spacers formed to relax the local electric field concentration

An imaging device includes a plurality of light-receiving elements arranged in a two-dimensional matrix shape. Each of the light-receiving elements includes a first electrode, a photoelectric conversion layer, and a second electrode. The photoelectric conversion layer has a laminated structure in which a first compound semiconductor layer having a first conductivity type and a second compound semiconductor layer having a second conductivity type that is a reverse conductivity type to the first conductivity type are laminated from a side of the first electrode. The second compound semiconductor layer has been removed in a region between the light-receiving elements. The first electrode and the first compound semiconductor layer are shared by the light-receiving elements. An impurity concentration of a first compound semiconductor layer near the first electrode is lower than that of a first compound semiconductor layer near the second compound semiconductor layer.

Imaging device and method for manufacturing the same

The present technology relates to a solid-state image pickup apparatus and electronic equipment that makes it possible to suppress read noise. A solid-state image pickup apparatus according to a first aspect of the present technology includes a photoelectric conversion section that generates and holds a charge in response to incident light, a transfer section that includes a V-NW transistor (Vertical Nano Wire transistor) and transfers the charge held in the photoelectric conversion section, and an accumulation section that includes a wiring layer connected to a drain of the transfer section including the V-NW transistor and accumulates the charge transferred by the transfer section. The present technology is applicable to a CMOS image sensor, for example.

The present technology relates to a transistor and a manufacturing method that make it possible to reduce noise. The transistor includes a gate electrode, a source region, and a drain region. The gate electrode is formed on a semiconductor substrate. The source region is formed on a surface of the semiconductor substrate and extended from the gate electrode. The drain region is positioned to oppose the source region and formed on the surface of the semiconductor substrate without being brought into contact with the gate electrode. The source region and the drain region are asymmetrical. The drain region is formed at a position deeper than the source region. At a gate end of the gate electrode, the drain region is formed at a distance from the surface of the semiconductor substrate. The present technology is applicable, for example, to an amplifying transistor.

Transistor and manufacturing method

The present technology relates to a semiconductor device, a manufacturing method of a semiconductor device, a solid-state imaging device, and an electronic device capable of reducing a parasitic capacitance between a gate electrode and source/drain electrodes and reducing a leakage current. The semiconductor device includes a first impurity region formed between element isolation regions on both sides, a gate electrode formed on an upper surface of a semiconductor substrate where the element isolation regions and the first impurity region are formed so that both ends are respectively overlapped with the element isolation regions on both sides and the gate electrode is separated from the first impurity region by a predetermined distance along a planar direction, and a second impurity region formed on the semiconductor substrate between the gate electrode and the first impurity region in plan view as having the same conductivity type as the first impurity region.

Semiconductor device, manufacturing method of the same, solid-state imaging device, and electronic device

Thin film transistor, display device, electronic apparatus and method of manufacturing thin film transistor

An imaging device includes a plurality of light-receiving elements arranged in a two-dimensional matrix shape. Each of the light-receiving elements includes a first electrode, a photoelectric conversion layer, and a second electrode. The photoelectric conversion layer has a laminated structure in which a first compound semiconductor layer having a first conductivity type and a second compound semiconductor layer having a second conductivity type that is a reverse conductivity type to the first conductivity type are laminated from a side of the first electrode. The second compound semiconductor layer has been removed in a reg between the light-receiving elements. The first electrode and the first compound semiconductor layer are shared by the light-receiving elements. An impurity concentration of a first compound semiconductor layer near the first electrode is lower than that of a first compound semiconductor layer near the second compound semiconductor layer.

Thin film transistor, with shaped base device, electronic apparatus and method of manufacturing thin film transistor

Provided is a solid-state imaging apparatus including: a plurality of photoelectric conversion units; an element isolation unit that performs element isolation between the plurality of photoelectric conversion units; and a diffusion prevention unit that prevents diffusion of a dark current component generated on an interfacial surface of the element isolation unit to a region surrounding the dark current component generation region.

Solid-state imaging apparatus, method of manufacturing solid-state imaging apparatus and electronic device

A solid-state imaging device including, active elements configured to handle the charge captured in a photoreceiving region, an element isolation region configured to isolate regions of the active element, a first impurity region configured to surround the element isolation region, and a second impurity region including an impurity region lower in impurity concentration than the first impurity region, the second impurity region being provided between the first impurity region and active elements.

Growing community of inventors

Kanagawa, Japan

Akiko Honjo