Shinko Electric Industries Co., Ltd.

Taiyo Yuden Co., Ltd.

Akihito Takano

Masahiro Sunohara

Mitsutoshi Higashi

Hideaki Sakaguchi

Akio Rokugawa

Yasuyoshi Horikawa

Kiyoshi Oi

Kenichi Ota

Yuichi Sasajima

Akira Fujisawa

Tomoo Yamasaki

Naohiro Mashino

Takahiro Iijima

Kiyoshi Ooi

Masayuki Sasaki

Ken Miyairi

Takayuki Tokunaga

Hedeaki Sakaguchi

A wiring board provided with a silicon substrate including a through hole that communicates a first surface and a second surface of the silicon substrate. A capacitor is formed on an insulating film, which is applied to the silicon substrate, on the first surface and a wall surface defining the through hole. A capacitor part of the capacitor includes a first electrode, a dielectric layer, and a second electrode that are sequentially deposited on the insulating film on the first surface and the wall surface of the through hole. A penetration electrode is formed in the through hole covered by the first electrode, the dielectric layer, and the second electrode of the capacitor part.

Wiring board, semiconductor device, and method for manufacturing wiring board

A wiring substrate includes an inorganic substrate including a substrate body formed of an inorganic material, a wiring pattern formed on the substrate body, and an external connection terminal being electrically connected to the wiring pattern, an organic substrate that is formed below the inorganic substrate, the organic substrate including an insulating layer and a wiring layer formed on the insulating layer, and a bonding layer interposed between the inorganic substrate and the organic substrate, the bonding layer including a stress buffer layer and a penetration wiring that penetrates the stress buffer layer. A thermal expansion coefficient of the stress buffer layer is greater than a thermal expansion coefficient of the inorganic substrate and less than a thermal expansion coefficient of the organic substrate. The wiring pattern and the wiring layer are electrically connected by way of the penetration wiring.

Wiring substrate, method for manufacturing wiring substrate, and semiconductor package including wiring substrate

A wiring board includes a silicon substrate with a through hole communicating with first and second substrate surfaces. A capacitor includes a capacitor part mounted on an insulating film covering the substrate first surface and including a first electrode on the insulating film, a first dielectric layer on the first electrode, and a second electrode on the first dielectric layer. A multilayer structure arranged on a wall surface defining the through hole includes the insulating film on the through hole wall surface, a first metal layer on the insulating film formed from the same material as the first electrode, a second dielectric layer on the first metal layer formed from the same material as the first dielectric layer, and a second metal layer on the second dielectric layer formed from the same material as the second electrode. The multilayer structure covers a penetration electrode in the through hole.

A wiring substrate includes a substrate body including a first substrate surface and a second substrate surface, a trench being open toward the first substrate surface, the trench having an inner bottom surface and an inner side surface, a through-hole having a first end communicating with the inner bottom surface of the trench and a second end being open toward the second substrate surface, a first conductive layer having a first surface toward the trench and being filled inside at least a portion of the through-hole from the second end, a second conductive layer covering the first surface and at least a part of the inner bottom surface of the trench, and a third conductive layer covering the second conductive layer and being filled inside the trench.

Wiring substrate and method for manufacturing the wiring substrate

A method of manufacturing a semiconductor device includes: (a) half-dicing a semiconductor wafer including plural semiconductor chips, thereby forming dicing grooves in the semiconductor wafer, wherein each semiconductor chip includes a circuit and pads and wherein the semiconductor wafer includes: a first surface on which the circuit and the pads are formed; and a second surface opposite to the first surface, (b) connecting the pads to each other by conductive connectors; (c) sealing the first surface of the semiconductor wafer, the dicing grooves and the conductive connectors with a resin; (d) grinding the second surface of the semiconductor wafer, thereby forming a group of sealed chips; (e) dividing the group of sealed chips into individual sealed chips; (f) mounting and stacking the individual sealed chips on a wiring substrate having connection terminals thereon; and (g) electrically-connecting the conductive connectors and the connection terminals using a conductive member.

Stacked semiconductor device and method of manufacturing the same

A semiconductor chip laminated body includes a wiring board having a connecting terminal; a plurality of semiconductor chips laminated on the wiring board, each of the semiconductor chips having a pad; conductive connecting members having first end parts connected to the pads of the corresponding semiconductor chips and second end parts projecting from side surfaces of the corresponding semiconductor chips; and a conductive member configured to connect the connecting terminal of the wiring board and the second end parts of the conductive connecting members; wherein conductive materials are exposed at the side surfaces of the semiconductor chips; and a gap is provided between the side surfaces of the semiconductor chips and the conductive member.

Laminated body of semiconductor chips including pads mutually connected to conductive member

In a capacitor device of the present invention, a capacitor parts that has a pair of terminals on both end sides respectively is embedded in an insulating film in a state that a lower surface of the capacitor parts is not covered with the insulating film, then upper wiring patterns that are connected to upper surfaces of a pair of terminals via holes formed in the insulating film on a pair of terminals are formed on an upper surface side of the insulating film respectively, and then lower wiring patterns that are connected to lower surfaces of a pair of terminals are formed on a lower surface side of the insulating film respectively.

Capacitor device and semiconductor device having the same, and capacitor device manufacturing method

A method of manufacturing an electronic parts packaging structure of the present invention, includes the steps of forming a first uncured resin layer on a substrate, arranging an electronic parts on the first uncured resin layer, forming a second uncured resin layer that covers the electronic parts, and obtaining an insulating layer, in which the electronic parts is embedded, by curing the first uncured resin layer and the second uncured resin layer by annealing.

Method of manufacturing an electronic parts packaging structure

A semiconductor device substrate includes a substrate body having a wiring layer. A base is formed by a material that is different from a material of the substrate body. The base supports the substrate body, and has an opening forming portion where a semiconductor element is mounted. A reinforcing member is larger than the opening forming portion, provided in the substrate body at a portion corresponding to the opening forming portion, and reinforces the substrate body at the portion corresponding to the opening forming portion.

Semiconductor device, semiconductor device substrate, and manufacturing method thereof that can increase reliability in mounting a semiconductor element

A multilayer circuit board for mounting a semiconductor element thereon, comprising a core substrate of a metal material and a plurality of wiring layers stacked on either side of the core substrate, each of the stacked wiring layers being isolated from an adjacent wiring layer by an insulating layer interposed therebetween, the multilayer circuit board having an area at which a heat spreader for dissipating heat generated from the semiconductor element mounted on the circuit board is to be joined to the multilayer circuit board, wherein the multilayer circuit board allows the heat spreader to be joined to the core substrate without the insulating layers being interposed therebetween. A semiconductor device using the multilayer circuit board is also disclosed.

Multilayer circuit board and semiconductor device using the same

A process facilitates manufacturing a multiple layer wiring board having therein a thin-film capacitor The process includes: forming a metallic film layer having a barrier metal layer and a metal layer to be sequentially anode oxidized on an insulating layer first conductor pattern; covering a lower electrode forming region of the thin film capacitor in the first conductor pattern with a first resist film; etching to remove an uncovered portion of the metallic film layer; removing the first resist film and covering the first conductor pattern, except for part of the metallic film layer, with a second resist film; forming an anodic oxidation film on the exposed metallic film layer; removing the second resist film and attaching an adherence layer and a metal seed layer, sequentially, on the anodic oxidation film end on the first conductor pattern; and forming an upper electrode second conductor pattern on the anodic oxidation film.

Process for manufacturing multiple layer wiring substrate onto which thin film capacitor is incorporated

The present invention relates to a thin film capacitor device having a copper wiring layer, a dielectric layer, and a barrier layer interposed between the wiring layer and the dielectric layer. The barrier layer has the function of preventing diffusion of copper of the wiring layer. The thin film capacitor device may also include an insulating substrate, a planarizing layer, an adhesion layer, and an intermediate layer. The present invention may also relate to a printed circuit substrate having the described thin film capacitor device built therein as a capacitor.

Growing community of inventors

Nagano, Japan

Akihito Takano