Sanyo Electric Co., Ltd.

Akihito Nagamatsu

Takashi Yamada

Shigeharu Matsushita

Yasoo Harada

Takayoshi Higashino

Emi Fujii

Satoshi Terada

Daijirou Inoue

Takashi Kurose

Kouji Matsumura

Tetsuro Sawai

Kimihiko Nagami

Seiichi Bamba

Haruo Nakano

A group III-V compound semiconductor doped with an impurity, having an undoped film of SiOx and a film for preventing the diffusion of Group V atoms (e.g., an SiN film) are formed on a crystal of Group III-V compound semiconductor in which the silicon in the SiOx film is diffused into the Group III-V compound semiconductor, thereby forming a doped layer.

Method of doping, semiconductor device, and method of fabricating

A method of doping a Group III-V compound semiconductor with an impurity, wherein after an undoped film of SiOx and a film for preventing the diffusion of Group V atoms (e.g., an SiN film) are formed in this order on a crystal of Group III-V compound semiconductor, the sample is subjected to at least one heat treatment to cause silicon in the SiOx film to diffuse into the Group III-V compound semiconductor, thereby forming a doped layer. Using this doped layer forming method, field-effect transistors, diodes, resistive layers, two-dimensional electron gas or one-dimensional quantum wires, zero-dimensional quantum boxes, electron wave interference devices, etc. are fabricated.

Method of doping a group III-V compound semiconductor

An active device such as an HEMT is formed on a GaAs substrate, and characteristics of this active device formed are measured. A circuit pattern of a passive circuit device including a serial microstrip line is simulated on the basis of the results of this measurement, and a circuit pattern obtained by the simulation is directly drawn on a substrate to form the passive circuit device, thereby to fabricate an MMIC. Accordingly, the passive circuit device is formed in conformity with the characteristics of the active device for each chip. As a result, the variation in characteristics of the active device is canceled, to obtain an MMIC superior in matching.

Method of fabricating MMIC semiconductor integrated circuits using the

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Moriguchi, Japan

Akihito Nagamatsu