Sharp Kabushiki Kaisha Corporation

Semiconductor Energy Laboratory Co., Ltd.

Funai Electric Company Ltd.

Knc Laboratories Co., Ltd.

Sato Special Oil Co., Ltd.

Balbis Co., Ltd.

Akihiro Oda

Kaoru Yamamoto

Yasuyuki Ogawa

Hiroshi Matsukizono

Shogo Murashige

Masahiro Tomida

Yujiro Takeda

Masayuki Sakakura

Kenichi Okazaki

Hiroyuki Ogawa

Yoshitaka Yamamoto

Kohhei Tanaka

Tadayoshi Miyamoto

Takuya Matsuo

Shigeyasu Mori

Tsutomu Murakawa

Masatoshi Yokoyama

Sumio Kato

An active matrix substrate of an embodiment of the present invention includes a substrate and a plurality of oxide semiconductor TFTs supported on the substrate. Each oxide semiconductor TFT includes a lower gate electrode provided on the substrate, a gate insulating layer covering the lower gate electrode, an oxide semiconductor layer provided on the gate insulating layer, a source electrode which is in contact with the source contact region of the oxide semiconductor layer, a drain electrode which is in contact with the drain contact region of the oxide semiconductor layer, an insulating layer covering the oxide semiconductor layer, the source electrode and the drain electrode, and an upper gate electrode provided on the insulating layer. When viewed in a normal direction of the substrate, the upper gate electrode does not overlap a first electrode which is one of the source electrode and the drain electrode, and a second electrode which is the other of the source electrode and the drain electrode does not overlap the lower gate electrode.

Active-matrix substrate and display device

An active matrix substrate includes: a substrate (); a peripheral circuit including a plurality of first TFTs (); and a plurality of second TFTs (), wherein each of the first and second TFTs () includes: a gate electrode (A,B); a gate insulating layer (); an oxide semiconductor layer (A,B) including a channel region (Ac,Bc), a source contact region (As,Bs) and a drain contact region (Ad,Bd), wherein the source contact region and the drain contact region are located on opposite sides of the channel region; a source electrode (A,B) that is in contact with the source contact region and a drain electrode (A,B) that is in contact with the drain contact region; the oxide semiconductor layer of the first TFTs and the second TFTs is formed from the same oxide semiconductor film; a carrier concentration in the channel regions (Ac) of the first TETs is higher than a carrier concentration in the channel regions (Bc) of the second TETs.

Active matrix substrate and method for producing same

An active matrix substrate includes a demultiplexer circuit which includes a plurality of DMX circuit TFTs. Each of the DMX circuit TFTs includes a front-gate electrode (FG) supplied with a control signal from one of a plurality of control signal main lines ASW, BSW and a back-gate electrode (BG) supplied with a back-gate signal which is different from the control signal. The plurality of DMX circuit TFTs includes first DMX circuit TFTs (T, T) and second DMX circuit TFTs (T, T). The back-gate electrode of each of the first DMX circuit TFTs (T, T)is connected with a first back-gate signal main line (BGL()) which supplies a first back-gate signal and, the back-gate electrode of each of the second DMX circuit TFTs (T, T)is connected with a second back-gate signal main line (BGL()) which supplies a second back-gate signal which is different from the first back-gate signal.

Active matrix substrate and demultiplexer circuit

A semiconductor device () includes a thin film transistor () provided on a substrate and including a gate electrode (), a gate insulating layer () in contact with the gate electrode, an oxide semiconductor layer () located so as to partially overlap the gate electrode with the gate insulating layer being located between the oxide semiconductor layer and the gate electrode, a source electrode (), and a drain electrode (). The oxide semiconductor layer () includes a gate facing region () overlapping the gate electrode as seen in a direction of normal to the substrate; and offset regions () provided adjacent to the gate facing region, the offset regions not overlapping the gate electrode, the source electrode or the drain electrode as seen in the direction of normal to the substrate. The gate facing region has a carrier concentration in the range of 1&#xd7;10/cmor greater and 1&#xd7;10/cmor less.

Semiconductor device and method for manufacturing same

A display device includes: a display unit, a driver unit, and a control unit. The display unit includes a plurality of pixel units arranged in a matrix. The driver unit includes an output transistor configured to drive a plurality of scanning lines connected to the plurality of pixel units. The control unit is configured to supply to the driver unit in a display period, a signal for displaying an image on the display unit, and control a bias state of the output transistor in a display suspension period, so that an absolute value of a threshold voltage of the output transistor which is increased in the display period decreases.

Display device and driving method thereof

A shift register circuit has a plurality of unit circuits that are cascade-connected to one another and that output received pulse signals as output signals in accordance with a clock signal, the shift register circuit sequentially outputting the output signals from the plurality of respective unit circuits. The output circuits each include a double-gate transistor having first gate electrode that controls conductivity between the drain electrode and the source electrode, and a second gate electrode formed through an insulating layer and disposed to face the first gate electrode across a semiconductor layer between the drain electrode and the source electrode. The shift register circuit applies a prescribed voltage to the second gate electrode in accordance with a voltage applied to the first gate electrode.

Shift register circuit, drive circuit, and display device

Provided is a semiconductor device in which generation of a parasitic channel in an end region of an oxide semiconductor film is suppressed. The semiconductor device includes a gate electrode, an oxide semiconductor film, a source electrode and a drain electrode, and a channel region formed in the oxide semiconductor film. The channel region is formed between a first side surface of the source electrode and a second side surface of the drain electrode opposite to the first side surface. The oxide semiconductor film has an end region which does not overlap with the gate electrode. The end region which does not overlap with the gate electrode is positioned between a first region that is the nearest to one end of the first side surface and a second region that is the nearest to one end of the second side surface.

Field effect device with oxide semiconductor layer

A bearing lubricant composition includes a base oil containing an ester compound (&#x3b1;) represent by the general formula (1), and has a pour point of &#x2212;30&#xb0; C. or lower and a viscosity index of 150 or more. [wherein, Ais a Clinear or branched alkylene group; and at least one of Xand Xis a Clinear or branched alkyl ether group, or when it is not an alkyl ether group, it is a Clinear or branched alkyl group.]

Bearing lubricant composition

This semiconductor device () includes a substrate (), a gate electrode (), a gate insulating film (), an oxide semiconductor layer (), a source electrode (), a drain electrode (), and a protective film (). The upper and side surfaces of the oxide semiconductor layer are covered with the source and drain electrodes and the protective film. When viewed along a normal to the substrate, the narrowest gap between the respective outer peripheries of a first contact region () and the source electrode and the narrowest gap between the respective outer peripheries of a second contact region () and the drain electrode both have a length of 1.5 &#x3bc;m to 4.5 &#x3bc;m.

Semiconductor device, display device, and semiconductor device manufacturing method

A projector includes a main body, a lens unit and a lens cover. The main body includes a housing and a groove formed on a bottom face of the housing. The lens unit is provided to the main body. The lens cover is configured to cover the lens unit. The lens cover is further configured to be fitted to the groove so that the lens cover rotatably supports the main body.

Projector

There is provided a method for stably fabricating a TFT having a GOLD structure capable of ensuring sufficiently high ON-state current and sufficiently low OFF-state current at the same time and superior in hot carrier resistance. The method includes forming a semiconductor layer of a specified configuration and then forming a gate insulator film on the semiconductor layer, forming a lightly doped region by doping the semiconductor layer with dopants at low concentration by using as a mask a dopant blocking film formed on the gate insulator film. The method further includes forming a gate electrode having a length reaching the lightly doped region after removing the dopant blocking film, forming an anodic oxide layer on each side face of the gate electrode by anodically oxidizing the gate electrode, forming a heavily doped region by doping the semiconductor layer with dopants by using as a mask the gate electrode and the anodic oxide layer, and removing the anodic oxide layer.

Growing community of inventors

Osaka, Japan

Akihiro Oda