Mitsubishi Electric Corporation

Mitsubishi Denki Kabushiki Kaisha

Advanced Display, Inc.

Kabushiki Kaisha Advanced Display

Akihiro Minami

Kazuhiro Ishiguchi

Jiro Takaki

The present invention has a comparing unit that compares each of image signals in a first clock period with a corresponding one of the image signals in a second clock period subsequent to the first clock period, and a cancelling unit that causes each of the image signals in the second clock period to be cancelled in the case where a comparison result from the comparing unit indicates that each of the image signals in the first clock period agrees with the corresponding one of the image signals in the second clock period.

Digital data transmission apparatus and digital data transmission method

In a plurality of source drivers, a unit start pulse inputted/outputted to/from the source drivers is cascaded between an ante-stage source driver and a post-stage source driver, a horizontal start pulse outputted from a timing controller is inputted to a first-stage source driver, and the duty ratio of a vertical clock is controlled by one of the plurality of cascaded unit start pulses. In a matrix display device, it is thereby possible to provide a timing controller having a simple circuit configuration which needs no counter circuit for generating a vertical clock to be outputted to a gate driver.

Matrix display device with cascading pulses and method of driving the same

An active matrix display device includes: a plurality of pixels that are disposed in a matrix; a plurality of image signal lines that are disposed to correspond to respective columns of the pixels; a plurality of scanning signal lines that are disposed to correspond to respective rows of the pixels; an image signal line driving unit that supplies image signals for driving the pixels to the image signal lines; and a timing control circuit that transmits an image display control signal to the image signal line driving unit with a predetermined cycle even during a vertical blanking period. The timing control circuit performs a control operation allows the image signal line driving unit to intermit a read operation of image display data during the first period that is defined within the vertical blanking period and that includes at least a second half of the vertical blanking period.

Active matrix display device and semiconductor device for timing control thereof

It is an object to provide a timing controller and an image display device which are capable of recognizing the resolution of a display panel with a simple structure. Image signal line driving devices include integrated plural driving circuits which are connected to one another in a cascade manner. Further, the image signal line driving devices are also connected to one another in a cascade manner. A timing controller transmits a horizontal start pulse to the image signal line driving device, then receives the returned horizontal start pulse returned thereto after being circulated through the driving circuits included in the image signal line driving devices and determines the resolution (the number of pixels) in the horizontal direction of the liquid crystal display panel based on the interval between the transmission and the reception of the start pulse.

Image display device and timing controller

A noise elimination circuit that eliminates a noise of a display control signal of a matrix display device, includes a rising edge detection circuit unit that detects a rising edge of a signal for eliminating a noise, a counter that performs a count operation during a predefined period of time, an initialization circuit unit that generates an initialization signal of the counter, a count enable circuit unit that generates a count allowance signal of the counter, and an initial state detection circuit unit that detects whether or not the counter is in an initial state. The counter starts the count operation from an initial value in response to a rising edge detection by the rising edge detection circuit unit. The counter is initialized again after the count operation during the predefined period of time is completed. An initial state detection signal by the initial state detection circuit unit becomes a signal from which a noise is eliminated.

Noise elimination circuit of matrix display device and matrix display device using the same

A liquid crystal driving device that supplies control signals including at least a polarity inversion signal for AC driving to an image signal line driving circuit, the polarity inversion signal includes polarity inversion pulses varied periodically at a prescribed period even in vertical blanking intervals. The last polarity inversion pulses at the last cycles in each of vertical blanking intervals are deleted.

Liquid crystal driving device

A control circuit can prevent malfunction of a scan line driving circuit even when any inputted signal is not in normal timing relation due to any cause. The control circuit includes: a counterfor counting up to a predetermined count number based on a clock inputted; a comparator arranged at the subsequent stage of the counter to determine whether or not the counter is under counting; and a protection circuit arranged at subsequent stage of the comparatorfor normalizing a start pulse that starts operation of the scan line driving circuit, even when any input signal of a timing controller is abnormal, by outputting a normalized start pulsevia AND gateto which a start pulsegenerated by the timing controller and an output signalof the comparatorare inputted.

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Kumamoto, Japan

Akihiro Minami