Kabushiki Kaisha Toshiba

Akihiro Horiguchi

Fumio Ueno

Mitsuo Kasori

Hiroyasu Sumino

Yoshiko Goto

Kazuo Shinozaki

Katsuyoshi Oh-Ishi

Akihiko Tsuge

Mituo Kasori

Hiroshi Inoue

Mitsuyoshi Endo

Hiroshi Komorita

Kazuo Kimura

Kazuo Anzai

Takeshi Takano

Jun Monma

Hiroshi Imagawa

Takeshi Saito

Masatoshi Sakurai

Katsuyuki Naito

Takashi Ikeda

Hideki Sato

Hiroshi Endo

Junichi Takahashi

Maki Yonetsu

Nobuyuki Mizunoya

Shun-ichiro Tanaka

Keiji Tsunoda

Motomasa Imai

Naoki Shutoh

Masanori Watanabe

Muneyuki Suzuki

Masaru Hayashi

Kazuo Nogami

Takahiro Murono

Tohru Kishigami

Naoki Shuto

Keitaro Hirai

Yoshiko Sato

Kazuaki Mori

An inter-network relay unit is provided that is capable of simultaneously achieving guaranteed minimum bandwidth and priority control (including relay priority, discard priority, delay priority, etc.). A rate controller outputs relatively high priority packets from priority queues as guaranteed traffic based on guaranteed bandwidth for each link. Relatively low priority packets left in the priority queues are marked for preferential discard and output as best-effort traffic by an aging timer. When an output port is congested, an output queue portion discards only the marked packets. Thus, traffic having a plurality of relay priorities can use the guaranteed minimum bandwidth effectively and the guaranteed minimum bandwidth can be secured, irrespective of change in traffic volume for each relay priority level.

Inter-network relay system and method

This invention has as its object to provide an ATM relay device which attains high-speed, large-capacity packet relaying by distributing the load on an IP forwarding unit without having to improve the operation speed, processing performance, and the like of an IP forwarding function. This invention has an ATM switch core ( ) for distributing input ATM cells to corresponding ones of a plurality of output ports on the basis of their destination information. A plurality of IP forwarding units ( - to -n), which are provided in correspondence with the respective output ports of the ATM switch core ( ) and have unique forwarding processing functions, execute predetermined forwarding processes for packets obtained by reassembling ATM cells input via the respective output ports. An SAR assigns destination information that assumes different values in units of packets to ATM cells, which form each of packets having an identical address of those processed by the plurality of IP forwarding units ( - to -n). The ATM cells of a packet assigned identical destination information by the SAR are stored in a PerVC queuing unit by a predetermined volume, and are output in the format that stores the ATM cells by the predetermined volume.

Distributing ATM cells to output ports based upon destination information using ATM switch core and IP forwarding

A photovoltaic conversion element comprising, a first transparent electrode, a transparent semiconductor layer disposed on the first transparent electrode, a sensitizing dye adsorption portion which is disposed on the surface of the transparent semiconductor layer, a carrier transport layer formed on the sensitizing dye adsorption portion, and a second transparent electrode disposed on the carrier transport layer, wherein the sensitizing dye adsorption portion comprises sensitizing dyes of plural kinds of color, which are adsorbed on a plurality of surface regions of the semiconductor layer.

Photovoltaic conversion element and a dye-sensitizing photovoltaic cell

Disclosed are a circuit substrate which comprises a silicon nitride ceramic plate 1 having a thermal conductivity at room temperature of 80 W/mK or more and a metal plate 2 joined to the silicon nitride ceramic plate 1 through a glass layer 3, and a semiconductor device in which the circuit substrate is mounted.

Silicon nitride ceramic circuit substrate and semiconductor device using

Disclosed is a silicon nitride circuit substrate, a manufacturing procee thereof, and a semiconductor device therewith. The circuit substrate comprises: a silicon nitride substrate; a metal circuit plate; and a intermediate layer being interposed between the silicon nitride board and the metal circuit plate for joining the silicon nitride substrate and the metal circuit plate, and having a compound containing an aluminum oxide component. The concentration of the aluminum oxide component in the intermediate layer is higher in the side of the metal circuit plate than in the side of the silicon nitride board.

Silicon nitride circuit substrate and semiconductor device containing

Disclosed are a high thermal conductivity silicon nitride circuit substrate which comprises a silicon nitride ceramic plate having a thermal conductivity at 25.degree. C. of 60 W/m.multidot.K or more and a metal circuit plate joined to the silicon nitride ceramic plate through an intermediate layer containing oxygen and at least one element selected from the group consisting of titanium, zirconium, hafnium, niobium and aluminum, and a semiconductor device using the same.

High thermal conductivity silicon nitride circuit substrate and

A circuit board having at least one insulator layer and at least one conductor layer which includes at least one of the whole insulator layers in a sintered body containing .beta.-Si.sub.3 N.sub.4 as a main component and at least one element selected from the group consisting of a rare earth element and an alkaline earth element, and at least one of the whole conductor layers contains at least one element selected from the group of IVb, Vb and VIb group of the periodic table, and at least one element selected from the group of a rare earth element and an alkaline earth element, and a Si element.

Circuit board with high strength and high reliability and process for

Disclosed is a sintered aluminum nitride composition and a circuit substrate for use in semiconductor device. The sintered aluminum nitride composition comprises: aluminum nitride; a first component given by a compound containing an element which is selected from the group consisting of alkaline earth elements and group IIIa elements of the periodic table; a second component made of either a simple silicon or a silicon-containig compound; and a third component made of either a simple manganese or a manganese-containing compound. The circuit substrate has an insulating layer which is compoesd of the above-described sintered aluminum nitride composition, and an electrically conductive layer containing an electrically conductive material and the same components as those of the insulating layer.

Sintered aluminum nitride and circuit substrate using sintered aluminum

Disclosed is a circuit substrate and a semiconductor device to which the circuit substrate is applied. The circuit substrate has an insulating layer and an electrically conductive layer. The insulating layer is composed of a sintered aluminum nitride composition containing: aluminum nitride; a first component given by a compound containing an element which is selected from the group consisting of group IIa elements and group IIIa elements of the periodic table; a second component given by either a simple boron or a boron compound; and a third component give by either a simple manganese or a manganese compound. The electrically conductive layer contains: a conductive component given by a metal or an electrically conductive compound for exhibiting electric conductivity; aluminum nitride; the first component; the second component; and the third component. The semiconductor device has the above circuit substrate, a semiconductor element mounted on the circuit substrate, and a cap being tightly bonded to the circuit substrate with a sealing glass to cover the semiconductor element.

Circuit substrate including insulating layer of aluminum nitride and

An ATM cell assembly and disassembly device capable of flexibly dealing with various data speeds on STM and ATM sides, and preventing the buffer overflow. In the ATM cell assembly device, the data stored in the buffer are outputted when an amount of the stored data becomes not less than a prescribed data amount sufficient for loading a payload section of each ATM cell, and the ATM cell flow is obtained from the ATM cells assembled from the data outputted from the buffer and empty cells. The buffer can be allowed to output the stored data only when the output permission signal issued in accordance with usage parameter control (UPC) parameters determined at a time of call set up is received. In the ATM cell disassembly device, the output data are stored into the buffer when a currently remaining capacity of the buffer becomes not less than an amount of data loaded in a payload section of each ATM cell, and the STM signals are obtained from the output data outputted from the buffer.

ATM cell assembly and disassembly device with enhanced data handling

Disclosed is an aluminum nitride sintered body which has a high thermal conductivity and a high strength and which can be manufactured through low-temperature, short-time sintering. This aluminum nitride sintered body has an average grain size of aluminum nitride grains of 2 .mu.m or less, a thermal conductivity of 80 W/m.K or more, and a relative density of 98% or more.

Method for manufacturing an aluminum nitride sintered body

Aluminum nitride sintered body, method for manufacturing the same, and

Disclosed is a method of manufacturing a circuit board comprising an insulating substrate and a conductor pattern of a low resistivity which can be prevented from being peeled off the substrate by a thermal stress. The method comprises the step of forming an insulating layer on an insulating substrate, the insulating layer being provided with a groove having a depth of at least 20 .mu.m and shaped like a conductor pattern which is to be formed later, the step of filling the groove of the insulating layer with a paste composition consisting of a powdery material capable of forming an electrically conductive metal, a fine particles having a thermal expansion coefficient smaller than that of the electrically conductive metal, the fine particles being used in an amount of 0.5 to 20% by volume based on the amount of the electrically conductive metal, and an organic binder, and the step of baking the paste composition so as to form a conductor pattern on the insulating substrate, the conductor pattern containing as a main component the electrically conductive metal and the fine particles having a thermal expansion coefficient smaller than that of the metal, the fine particles being dispersed in the electrically conductive metal in an amount of 0.5 to 20% by volume based on the amount of the electrically conductive metal.

Method of manufacturing circuit board and circuit board itself

In an aluminum nitride structure, a plurality of aluminum nitride regions having different purities are integrally formed to satisfy a predetermined positional relationship, and neighboring regions are brought into direct contact with each other to form an abrupt junction therebetween. Therefore, the aluminum nitride structure has anisotropy in physical properties such as a thermal conductivity, a light transmittance, and a strength.

Method of manufacturing aluminum nitride structure with anisotropic

According to this invention, there is provided a method of manufacturing a highly reliable circuit board in which a copper member is strongly, directly bonded to a substrate made of an aluminum nitride sintered body, thereby obtaining high peel strength. The method of manufacturing the circuit board includes the steps of bringing a copper member containing 100 to 1,000 ppm of oxygen into contact with an oxide layer having a thickness of 0.1 to 5 .mu.m formed on a surface of a substrate made of an aluminum nitride sintered body, and heating the substrate in an inert gas atmosphere containing 1 to 100 ppm of oxygen at a temperature not more than a temperature corresponding to a liquidus including a pure copper melting point of a hypoeutectic region of a two-component phase diagram of Cu-Cu.sub.2 O and not less than a temperature corresponding to a eutectic line obtained by connecting a line corresponding to copper and a line corresponding to a cuporus oxide composition, and directly bonding the copper member to the substrate.

Method of manufacturing circuit board

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Kawasaki, Japan

Akihiro Horiguchi