Fujitsu Corporation

Fujitsu Semiconductor Limited

Akihiro Hata

Hiroshi Tomonaga

Kazuto Nishimura

Satoshi Nishimura

Atsushi Kitada

Yuji Ikegami

Masaki Hirota

Satoshi Nemoto

Katsumi Imamura

Masamichi Kasa

Toshihiro Ban

Shigeyuki Kobayashi

Yuuji Kubo

Mami Sekido

Satoshi Sumino

Norihito Hama

A communication device includes a processor. The processor updates, when a port which is received a packet is connected to a first path or a second path, an identifier assigned to the packet from a value according to the path to a first value or a second value. The processor learns a correspondence relationship between a destination address of the packet and a transmission port by flooding the packet, and determines the transmission port based on the correspondence relationship. The processor updates, when the transmission port is connected to the first path or the second path, the identifier assigned to the packet of which the transmission port is determined to a value according to the first path or the second path. The processor discards the packet of which the identifier is updated to the second value by the first process and the transmission port is connected to the second path.

Communication apparatus and communication method

A packet transmission device includes a buffer stores packet data in any of queues, a queue manager outputs queue-status signals indicating whether or not transmittable packet data exists in the corresponding one of the queues, a bandwidth controller outputs token-status signals indicating whether or not an amount of the tokens accumulated at a certain period for the corresponding queue is larger than a token threshold provided for the corresponding queue, a queue selector preferentially selects any queue whose duration time of a transmittable state in which the corresponding queue status signal indicates that transmittable packet data exists in the corresponding queue and the corresponding token-status signal indicates that the amount of the accumulated tokens is larger than the token threshold provided for the corresponding queue is greater than a duration-time threshold provided for the corresponding queue, and a buffer reader controls reading of the packet data from the selected queue.

Packet transmission device, memory control circuit, and packet transmission method

A signal processor includes a processor that counts the number of input data pieces or a size of each of the input data pieces; a first memory that stores a result of the counting by the processor; and a second memory that records whether the result of the counting exceeds a capacity of the first memory.

Signal processor, transmission apparatus, and method for processing signal

In a packet relay method and device which can reduce a congestion of switching even when segment data are concentrated, segment data dividing portions respectively extract a destination address and a packet length from received packets, divide the packets into predetermined length data based on each packet length, and generates location information indicating locations in the packets respectively for the data. The segment data dividing portions add segment headers in which the location information, the destination address, and an address of its own device as a source address are set are added to each of the data, generate segment data, and provide the segment data to switches within a switch card in parallel.

Packet relay method and device

A transmission device which capsules and decapsules data of a frame and/or a packet includes a decapsuling circuit, wherein the decapsuling circuit includes a bit de-stuff processor configured to perform bit de-stuffing processing on an input data; a byte de-stuff processor configured to perform byte de-stuffing processing on duplicated data of the input data; a check processor configured to perform frame check sequence (FCS) processing on output from the bit de-stuff processor and the byte de-stuff processor; and a mode determination circuit configured to determine a stuffing mode of an opposite transmission device, based on a code conversion result from the bit de-stuff processor and the byte de-stuff processor and the stuffing mode in which the check processor detects the input data with a normal FCS.

Transmission device and transmitting method

An apparatus for controlling buffering of an arrival packet. The apparatus includes a packet buffer for temporarily storing each of one or more packets to be transmitted in association with an arrival time thereof, and a packet discard section for determining an arrival packet to be discarded or to be stored in the packet buffer, based on a discard condition defined by using a packet residence time that is calculated on the basis of one or more residence times of one or more packets staying in the packet buffer, wherein the arrival packet is defined as a packet that has newly arrived at the apparatus.

Apparatus and method for controlling buffering of an arrival packet

In a data transmission device and method provided with duplexed switches outputting frames in the order of input for continuing the communication without instantaneous interruptions even though one of the switches is faulted, input interfaces generate frames in which every time data is inputted, input order information indicating the input order is added to the data together with unique information of each input interface and providing the frame generated to the switches in parallel. At least one output interface sequentially stores the frames outputted from the switches for every unique information and selects a first arrived frame among the frames stored with same input order information.

Data transmission device

The packet forwarding apparatus of the present invention includes a packet buffer for temporarily storing packets to be forwarded, a timer for measuring the time of every predetermined unit period, a plurality of first queues corresponding to each of a plurality of address groups that form the packet buffer, a plurality of second queues that are provided corresponding to the property of the packets, a first controller for executing the writing of the packets, and a second controller for executing the discarding of the packets. According to this invention, through managing the first queues and the second queues, packets in the packet buffer can be discarded without the packets being read from the packet buffer.

Packet forwarding apparatus and method for discarding packets

A queue selection method for controlling selection of many queues without increasing the circuit scale is provided. Queues are organized into groups, and each group is created as a tree structure with a plurality of steps, and a queue is selected by selecting a group of each step. By this, even if the number of queues is enormous, it is sufficient to provide registers for managing the presence of packets only for the number of groups selected in each step, and it becomes unnecessary to provide registers for all of the queues, so an increase of registers can be suppressed even if the number of queues increases. It is preferable that group selection in each step is performed in parallel independently from pipeline processing so as to maintain high-speed operation.

Queue selection method and scheduling device

A switching apparatus for learning a source address set in a packet in an address learning table and delivering a packet on the basis of an address learned in the address learning table includes an address learning unit for limiting a number of learned addresses such that a number of learned addresses for each user group in the address learning table is equal to or less than an address learning upper limit value for the user group.

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Kawasaki, Japan

Akihiro Hata