Sanyo Electric Co., Ltd.

Sanyo Semiconductor Co., Ltd.

On Semiconductor Trading, Ltd.

Akihiro Hasegawa

Takashi Ogawa

Yoji Nomura

Hironori Terazawa

Yuuhei Mouri

Takashi Naruse

A semiconductor device includes a Hall element, which is switched between a first and second mode. In the first mode, connection A between a first and second resistor and connection C between a third and fourth resistor are set to Vcc or GND. Connection D between the first and fourth resistor and connection B between the second and third resistor are set as output terminals. In the second mode, D and B are set to Vcc or GND and A and C are set as output terminals. When a first line placed along the second resistor and connected to A is set at Vcc in the first mode, a second line placed along the fourth resistor and connected to D is set at Vcc in the second mode. When the first line is set at GND in first mode, the second line is set at GND in the second mode.

Semiconductor device used for adjustment of output of a hall element

An open portion is provided to an interlayer insulation film so as to correspond to a photoreceptor part of an optical detection device. A partition wall for surrounding the open portion () is formed by a metal material inside a wiring structure layer () along the boundary between the photoreceptor part () and a circuit part (). The partition wall is formed by a contact structure having a multi-level structure with respect to a separation region () disposed on the external periphery of the photoreceptor part (). The partition wall prevents moisture absorption and light penetration from the wall surface of the open portion, and suppresses wiring degradation or fluctuation of the characteristics of the circuit elements on the periphery of the photoreceptor part.

Semiconductor device

In a laser pickup photodetector of an optical disk playback device, the sensitivity to blue light is improved. On a main surface of a semiconductor substrate, a high resistivity epitaxial layer that becomes an i layer of a PIN photodiode (PIN-PD) is formed. On a surface of the epitaxial layer, two trenches are formed, on a surface of one trench an Nregion that becomes a cathode region of the PIN-PD is formed, and on a surface of the other trench a Pregion that becomes an anode region is formed. When the cathode region and the anode region are set in a reverse bias state, a light receiving semiconductor region that is an i layer between the cathode region and anode region is depleted. The depleted layer expands to a surface of the semiconductor substrate. Accordingly, for blue light having a short wavelength, signal charges can be generated on a surface of the semiconductor substrate and the cathode region can collect the signal charges and extract the charges as a light receiving signal.

Pin photodiode with improved blue light sensitivity

In a photodetector where a circuit section, in which an interconnection is formed, is formed adjacent to a light receiving section, photo sensitivity within a light receiving surface is prevented from being non-uniform due to an interlayer insulating film at a periphery of the light receiving section being increased in thickness. In a circuit region, a buffer region is disposed adjacent to a light receiving section. In the buffer region, in order to reduce irregularity of an interlayer insulating film, a density of planarizing pads disposed between the interconnections is gradually reduced from a standard value in a region as it approaches the light receiving section.

Optical sensor with improved planarization

A four-division photodetector where a formation process of an element isolation structure is simplified is provided. On a P-sub layer that is a common anode of PIN photodiodes (PIN-PD) for every partition, a high resistivity epitaxial layer that is an i layer of the PIN-PD is grown. At a boundary of the partitions, ion implantation is applied from a substrate surface to form an isolation region that is a Pregion. When a cathode region formed for every partition and the P-sub layer are reverse-biased to operate the PIN-PD, the isolation region is set at a ground potential together with the P-sub layer to operate as an anode. As a result, in the epitaxial layer at a position sandwiched between the isolation region and the P-sub layer, a potential barrier to electrons is formed. As a result, electrons generated owing to light absorption in the respective partitions can be inhibited from moving to adjacent partitions and element isolation can thus be realized.

Growing community of inventors

Hashima, Japan

Akihiro Hasegawa