Renesas Electronics Corporation

Akihiko Kanda

Koichi Takeda

Takahiro Shimoi

Yoshihiko Asai

Ken Matsubara

Tomoya Ogawa

Shota Okayama

Tamiyu Kato

Genta Watanabe

Takanori Moriyasu

Kazuo Yoshihara

A clamp elementapplies a fixed potential to a bit line BL at a time of a readout operation. A reference current source RCS generates a reference current Iref. An offset current source OCSis activated at a time of a readout operation for an OTP cell OTPC, and at a time of being activated, generates an offset current Iofto be subtracted from a cell current Icel. At the time of the readout operation for the OTP cell OTPC, the sense amplifier SA detects a magnitude relationship between the reference current Iref and a readout current Ird obtained by subtracting the offset current Ioffrom the cell current Icel.

Semiconductor device

A semiconductor device capable of changing a data programming process in a simple manner according to a situation is provided. The semiconductor device includes a plurality of memory cells, a programming circuit for supplying a programming current to the memory cell, and a power supply circuit for supplying power to the programming circuit. The power supply circuit includes a charge pump circuit for boosting the external power supply, a voltage of the external power supply according to the selection indication, and a selectable circuit capable of switching the boosted voltage boosted by the charge pump circuit. The control circuit further includes a control circuit for executing data programming processing by the programming circuit by switching the selection indication.

Semiconductor device and semiconductor system

An object of the present invention is to increase a writing speed to a flash memory while suppressing an increase in noise. In the high-speed write mode, the memory controller simultaneously performs a first write operation with a second write current having a current value smaller than the first write current with respect to a second number of memory cells having a larger number than the first write current. At the completion of the first write operation, the memory controller simultaneously performs the second write operation by the third write current having a larger current value than the second write current with respect to the memory cell determined by the sense amplifier to have not completed the write operation in the determination process.

An object of the present invention is to provide a semiconductor device capable of simplifying a trimming operation. A semiconductor device according to an embodiment includes a power supply circuit and a trimming circuit. The power supply circuit includes a reference voltage generation circuit that generates a plurality of reference voltages used at the time of a trimming operation, and a voltage generation circuit that generates a plurality of power supply voltages used by a semiconductor storage device. The semiconductor device adjusts a specific reference voltage using an external reference voltage at the time of the trimming operation, and then determines trimming codes corresponding to the adjustment amounts of the power supply voltages using a plurality of reference voltages generated using the adjusted specific reference voltage and a plurality of power supply voltages corresponding to the reference voltages.

The trimming range of a reference current is extended larger than that of the related art. A semiconductor device includes a reference current generating circuit that generates a reference current. The reference current includes a first base current, a second base current base current, a second base current, a temperature compensating current, and a voltage compensating current. The first base current can be trimmed. The second base current flowing opposite to the first base current can be trimmed. The temperature compensating current flows in the same direction as the first base current and has higher temperature dependence than the first and second base currents. The voltage compensating current flows in the same direction as the first base current and depends on power supply voltages more than the base currents.

The present invention provides a semiconductor memory device capable of preventing erroneous writing of a data signal. In DL drivers of an MRAM, transistors corresponding to a selected digit line group are made conductive to charge 16 digit lines to power supply voltage and charge a node to a predetermined voltage VP=VDD&#x2212;VTH. After that, a transistor corresponding to the selected digit line is made conductive to make magnetization current flow. Therefore, occurrence of overshooting of magnetization current when the transistor is made conductive can be prevented.

Growing community of inventors

Tokyo, Japan

Akihiko Kanda