Toshiba Memory Corporation

Kabushiki Kaisha Toshiba

Kioxia Corporation

Akifumi Gawase

Yukiteru Matsui

Takahiko Kawasaki

Gaku Minamihaba

Hajime Eda

Atsuko Sakata

Yasuhito Yoshimizu

Kei Watanabe

Kenji Iwade

Mikiya Sakashita

Hiroshi Tomita

Kyoichi Suguro

Toshihiko Nagase

Shinya Arai

Kazuhiro Matsuo

Shinji Mori

Masako Kodera

Keiichi Sawa

Takeshi Iwasaki

Yuya Akeboshi

Kenichi Otsuka

Tsutomu Miki

Tomoki Ishimaru

Ryohei Kitao

Yosuke Otsuka

Yimin Liu

Shuji Suzuki

Shuntaro Yamashita

Yuta Konno

Kohei Nagata

According to one embodiment, a semiconductor device includes first and second electrodes comprising a metal oxide an oxide semiconductor layer between the first and second electrodes, a gate electrode surrounding the oxide semiconductor layer, a gate insulating layer, a first insulating layer between the first and gate electrodes, a second insulating layer between the second and gate electrodes, a first conductive layer contacting the surface of the first electrode, a second conductive layer contacting the surface of second electrode, a first layer surrounding the first electrode, a second layer surrounding the second electrode, a third insulating layer between the first electrode and the first insulating layer and contacting the gate insulating layer and the first layer, and a fourth insulating layer between the second electrode and the second insulating layer and contacting the gate insulating layer and the second layer.

Semiconductor device and semiconductor memory device

A semiconductor device includes first conductive layers, a width in a first direction thereof being a first width, a second conductive layer arranged with first conductive layers, a smaller one of a width in the first direction thereof and a width in a second direction thereof being a second width that is larger than the first width, a third conductive layer in contact with one end portion of at least one of first conductive layers, and a fourth conductive layer in contact with one end portion of the second conductive layer. The at least one of first conductive layers and the second conductive layer contain a first metal, a second metal, and oxygen (O). A concentration of the first metal of the at least one of first conductive layers is higher than a concentration of the first metal of the second conductive layer.

Semiconductor device and method of manufacturing the same

A film forming apparatus according to an embodiment includes: a process chamber forming a film on a substrate; an abatement device detoxifying a first exhaust gas exhausted from the process chamber; a first supply pipe for supplying a gas containing water to the process chamber; a first vacuum pump provided in a first flow path of the first exhaust gas between the process chamber and the abatement device; a second vacuum pump provided in the first flow path between the first vacuum pump and the abatement device; and a first detector provided in the first flow path between the second vacuum pump and the abatement device and capable of detecting a hydrogenated gas.

Film forming apparatus and film forming method

Provided is a semiconductor device of the embodiment including: an oxide semiconductor layer; a gate electrode; a first electrode electrically connected to one portion of the oxide semiconductor layer, the first electrode including a first region, second region, a third region, and a fourth region, the first region disposed between the first portion and the second region, the first region disposed between the third region and the fourth region, the first region containing at least one element of In, Zn, Sn or Cd, and oxygen, the second region containing at least one metal element of Ti, Ta, W, or Ru, the third region and the fourth region containing the at least one metal element and oxygen, the third region and the fourth region having an atomic concentration of oxygen higher than that of the second region; and a second electrode electrically connected to another portion of the oxide semiconductor layer.

A polishing pad is described. The polishing pad includes a surface having plural recess portions, and a substrate is polished by the surface. In the pad, an average width of the recess portions at one area of the surface in a direction parallel to the surface is 20 μm or less, and an average density of the recess portions at one area of the surface is 1,300/mmor more.

Polishing pad, semiconductor fabricating device and fabricating method of semiconductor device

According to one embodiment, a polishing apparatus includes a holder for holding a polishing pad for polishing a surface of a substrate. A plurality of pressing members are configured to press a back surface side of the polishing pad while held by the holder. A driving unit is configured to selectively move pressing members in a direction towards the surface of the substrate so as to press the back surface side of the polishing pad.

Polishing device, polishing head, polishing method, and method of manufacturing semiconductor device

A semiconductor device of an embodiment includes a first electrode, a second electrode, a first metallic region provided between the first electrode and the second electrode and includes at least one metallic element selected from the group consisting of indium (In), gallium (Ga), zinc (Zn), aluminum (Al), magnesium (Mg), manganese (Mn), titanium (Ti), tungsten (W), molybdenum (Mo), and tin (Sn), a second metallic region provided between the first metallic region and the second electrode and includes the at least one metallic element, a semiconductor region provided between the first metallic region and the second metallic region and includes the at least one metallic element and oxygen (O), an insulating region provided between the first metallic region and the second metallic region and is surrounded by the semiconductor region, a gate electrode surrounding the semiconductor region, and a gate insulating layer provided between the semiconductor region and the gate electrode.

A semiconductor device production method includes forming a first recess portion in a first insulating film formed on a first substrate and a first conductive layer on the front surface of the first insulating film located inside and outside the first recess portion. In the first recess portion, a first pad is formed having a width of 3 &#x3bc;m or less and including the first conductive layer by performing a first polishing the first conductive layer at a first polishing rate and, after the first polishing, a second polishing the first conductive layer at a second polishing rate lower than the first polishing rate. The first pad of the first substrate and a second pad of a second substrate are joined together by annealing the first substrate and the second substrate. The selection ratio of the first conductive layer to the first insulating film is 0.3 to 0.4.

Semiconductor device production method

In accordance with an embodiment, a manufacturing method of a semiconductor device includes bringing a first catalyst into contact with a workpiece to form an oxide film on a surface of the workpiece, and bringing a second catalyst different from the first catalyst and the oxide film into contact with each other or moving the second catalyst and the oxide film closer to each other to elute the oxide film into a treatment liquid.

Manufacturing method of semiconductor device and semiconductor device manufacturing apparatus

A method for manufacturing a semiconductor device according to an embodiment includes: forming a first layer on a semiconductor substrate, a surface of the first layer having a first plane of which distance from the semiconductor substrate is a first distance and a second plane of which distance from the semiconductor substrate is a second distance smaller than the first distance, and a difference between the first distance and the second distance being 30 nm or more; performing planarization processing on the first layer to have the difference of less than 30 nm; forming a second layer directly on the first layer after performing the planarization processing; supplying a resist to the second layer; bringing a template having a pattern into contact with the resist to form a resist layer to which the pattern has been transferred; and etching the second layer using the resist layer as a mask.

Method for manufacturing semiconductor device

In accordance with an embodiment, a manufacturing method of a semiconductor device includes detecting elastic waves, and detecting or predicting an abnormality of the processing object occurring during polishing of the processing object. The elastic waves are generated from the processing object during the polishing. The abnormality is detected or predicted by analyzing the detected elastic waves.

Manufacturing method of semiconductor device and semiconductor manufacturing apparatus

According to one embodiment, a semiconductor device includes a substrate, a stacked body, a second air gap, a first insulating film, a semiconductor film, and a stacked film. The stacked body is provided above the substrate and includes a plurality of electrode films stacked via a first air gap. The second air gap extends in a stacking direction of the stacked body. The second air gap separates the stacked body in a first direction crossing the stacking direction. The first insulating film is provided above the stacked body and covers an upper end of the second air gap. The stacked film is provided between a side surface of the electrode film and a side surface of the semiconductor film opposed to the side surface of the electrode film. The stacked film is in contact with the side surface of the electrode film and the side surface of the semiconductor film.

Semiconductor memory device having air gap

According to one embodiment, a planarization method and a planarization apparatus are provided. In the planarization method, a work surface of a work piece is planarized by bringing the work surface of the work piece containing a silicon oxide film and a surface of a solid plate onto which hydrogen ions are adsorbed, into contact or extremely close proximity with one another in a state in which a process liquid containing fluorine ions is supplied to the surface of the solid plate.

Planarization method and planarization apparatus

According to one embodiment, a dresser includes a base metal plate, and a plurality of chip portions that are provided on the base metal plate. Each chip portion includes a Si substrate having a projection at an upper portion thereof and a diamond layer provided on the projection of the Si substrate.

Growing community of inventors

Mie, Japan

Akifumi Gawase