Renesas Electronics Corporation

Renesas Technology Corp.

Mitsubishi Denki Kabushiki Kaisha

Mitsubishi Electric Corporation

Akie Yutani

Yasutaka Nishioka

Kazuhito Ichinose

Tomonori Okudaira

Keiichiro Kashihara

Hiromi Itoh

Yoshikazu Tsunemine

An infrared solid state imaging device includes: a first PN junction diode has a first shortest length that is a shortest length from a first junction surface to a second junction surface; a PN junction diode has a second shortest length that is a shortest length from the second junction surface to a third junction surface, the second shortest length being different from the first shortest length; an insulating film serving as an element isolation region which establishes electrical isolation between a first region of the first PN junction diode and a fourth region of the second PN junction diode, and so on; and a metal wire provided on a second region of the first PN junction diode and a third region of the second PN junction diode, wherein the first PN junction diode and the second PN junction diode are connected in series.

Infrared solid state imaging device

This infrared ray detection element has a diode part that includes serially connected first and second p-n junction diodes. The diode part has: n-type and p-type first regions in a well shape that are adjacent to each other; a p-type second region that constitutes a first p-n junction diode with the n-type first region; and an n-type second region that constitutes a second p-n junction diode with the p-type first region. The n-type and p-type first regions are respectively provided with n-type and p-type third regions that electrically connect the first p-n junction diode and the second p-n junction diode via a conductive material. The n-type first region has a p-type fourth region provided between the p-type first region and the p-type second region. The p-type first region has an n-type fourth region provided between the n-type first region and the n-type second region.

Infrared ray detection element and method for manufacturing infrared ray detection element

By selectively anisotropically etching a stack film formed to cover a plurality of photodiodes and a gate electrode layer of a MOS transistor, the stack film remains on each of the plurality of photodiodes to form a lower antireflection coating and the stack film remains on a sidewall of the gate electrode layer to form a sidewall Using the gate electrode layer and the sidewall as a mask, an impurity is introduced to form a source/drain region of the MOS transistor. After the impurity was introduced, an upper antireflection coating is formed at least on a lower antireflection coating At least any of the upper antireflection coating and the lower antireflection coating is etched such that the antireflection coatings on the two respective photodiodes are different in thickness from each other.

Solid-state image sensing device and method of manufacturing the same

By selectively anisotropically etching a stack film formed to cover a plurality of photodiodes and a gate electrode layer of a MOS transistor, the stack film remains on each of the plurality of photodiodes to form a lower antireflection coating and the stack film remains on a sidewall of the gate electrode layer to form a sidewall. Using the gate electrode layer and the sidewall as a mask, an impurity is introduced to form a source/drain region of the MOS transistor. After the impurity was introduced, an upper antireflection coating is formed at least on a lower antireflection coating. At least any of the upper antireflection coating fAh and the lower antireflection coating is etched such that the antireflection coatings on the two respective photodiodes are different in thickness from each other.

By selectively anisotropically etching a stack film formed to cover a plurality of photodiodes and a gate electrode layer of a MOS transistor, the stack film remains on each of the plurality of photodiodes to form a lower antireflection coating and the stack film remains on a sidewall of the gate electrode layer to form a sidewall. Using the gate electrode layer and the sidewall as a mask, an impurity is introduced to form a source/drain region of the MOS transistor. After the impurity was introduced, an upper antireflection coating is formed at least on a lower antireflection coating. At least any of the upper antireflection coating and the lower antireflection coating is etched such that the antireflection coatings on the two respective photodiodes are different in thickness from each other.

A method of manufacturing a semiconductor device according to the present invention includes the steps of introducing first impurities of a first conductivity type into a main surface of a semiconductor substrateto form a first impurity region, introducing second impurities of a second conductivity type to form a second impurity region, forming a first nickel silicide film on the first impurity region and forming a second nickel silicide film on the second impurity region, removing an oxide film formed on each of the first and second nickel silicide films by using a mixed gas having an NHgas and a gas containing a hydrogen element mixed therein, and forming a first conducting film on the first nickel silicide film and forming a second conducting film on the second nickel silicide film, with the oxide film removed.

Method of manufacturing a semiconductor device

Semiconductor device

A method for manufacturing a capacitor is provided which can form a lower electrode having a high aspect ratio without suffering deterioration of the capacitor electric characteristics even when a platinum-group metal is adopted as the material of the lower electrode and a metal oxide having a high dielectric constant is adopted as the material of the dielectric film. Holes ( ) that reach contact plugs ( ) are formed in an insulating film ( ). Then a dielectric film ( ) is formed on the surfaces of the holes ( ). Next the dielectric film ( ) on the bottoms of the holes ( ) are etched away to form holes ( ) reaching the contact plugs ( ). Lower electrodes ( ) are then formed to fill the holes ( ) and ( ).

Capacitor manufacturing method having dielectric formed before electrode

A semiconductor device which includes a capacitor wherein the capacitance of the capacitor can be prevented from being lowered even in the case that the capacitor is miniaturized. A core insulating film having the core of the capacitor formed above a semiconductor substrate, a capacitor lower electrode formed so as to cover side surfaces of this core insulating film, a capacitor dielectric film formed so as to cover the surface of this capacitor lower electrode and the upper surface of the core insulating film and a capacitor upper electrode formed so as to cover the surface of this core insulating film are provided so that the bottom surface of the core insulating film is positioned lower than the bottom surface of the capacitor lower electrode.

An oxide dielectric film ( ) is formed of barium strontium titanate to have a thickness of 300 to 600 &angst;, and a first platinum layer ( ) is deposited thereon by, e.g., sputtering at a temperature not higher than 250&deg; C. to have a thickness of 250 to 500 &angst;. Further, a second platinum layer ( ) is deposited on the first platinum layer ( ) by, e.g., sputtering at a temperature of 250 to 500&deg; C. to have a thickness of 250 to 500 &angst;. Since the first platinum layer ( ) has less grain boundary and is hard to connect to that of the second platinum layer ( ), with less grain boundary diffusion caused, even if a hydrogen sintering of an aluminum interconnection layer ( ) is performed, reduction species are unlikely to reach the oxide dielectric film ( ) through the grain boundary. That suppresses deterioration of the oxide dielectric film ( ) to avoid an increase of leak current therein. Moreover, since the surface area of the second platinum layer ( ) increases, the adherence between the second platinum layer ( ) and an interlayer insulating film ( ) provided thereon is improved.

Capacitive element

Referring to a capacitor having a capacitor dielectric film made of a high dielectric film, it is possible to obtain a method of manufacturing a semiconductor device capable of forming a fine storage node made of a noble metal. A polysilicon film is formed over a whole face of an interlayer insulating film ( ), and is then subjected to anisotropic dry etching by using, as a mask, a resist having a predetermined opening pattern. Consequently, a polysilicon film ( ) is formed in contact with a plug layer ( ). Next, a noble metal element is substituted for a silicon element contained in the polysilicon film ( ). Thus, it is possible to form a storage node ( ) which has at least a surface made of the noble metal element and has the same three-dimensional configuration as the polysilicon film ( ) obtained before the substitution.

Growing community of inventors

Chiyoda-ku, Japan

Akie Yutani