Matsushita Electric Industrial Co., Ltd.

Akemi Kawaguchi

Masayuki Endo

Nobuo Aoi

Shin Hashimoto

Kousaku Yano

Mikio Nishio

Yuka Terai

Minoru Kubo

Layer forming material and wiring forming method

On a semiconductor substrate, an SiO.sub.2 layer as an insulating layer and an intermediate insulating layer are stacked successively. The intermediate insulating layer selectively has an opening portion and a copper wiring is formedwithin the opening portion. The copper wiring is covered with an anti-oxidation layer. The anti-oxidation layer is formed of copper sulfide so that it becomes unnecessary to form another anti-oxidation layer which does not contain copper, the treatment in the vacuum can be simplified or thermal treatment step at high temperatures can be omitted.

Method for forming wiring for a semiconductor device

A first insulating film is formed on a semiconductor substrate. A metal wire made of an aluminum alloy containing copper is formed on the first insulating film. An antireflection film is formed on the top face of the metal wire. On the region of the side face of the metal wire uncovered with an aluminum oxide film, there is formed a copper sulfide film, which is a sulfide film of copper. A second insulating film is formed over the metal wire formed with the antireflection film as well as the copper sulfide film and the first insulating film.

Semiconductor device and method of manufacturing the same

Metal formed on a semiconductor wafer is brought into contact with ions adapted to corrode the metal, and subjected to constant-current electrolysis using a galvanostat. The electrode potential of the metal is measured. There are obtained (i) the relationship between current value and time of pitting corrosion and (ii) the critical current value, based on which the metal is evaluated for surface smoothness, the pitting corrosion resistance of metal surface, resistance to pitting corrosion, the segregation amount and concentration of trace metal contained in the metal, and the grain size or grain boundary length of the metal.

Metal surface state evaluation method and semiconductor device

A contact hole and a wiring groove are formed in an insulating layer formed on a semiconductor substrate. A silver layer is formed inside of the contact hole and the wiring groove and on the insulating layer with the use of an electroless plating bath comprising: silver nitrate containing silver ions; tartaric acid serving as a reducing agent of the silver ions; ethylenediamine serving as a complexing agent of the silver ions; and metallic ions of tetramethylammoniumhydroxide serving as a pH control agent. Then, the silver layer on the insulating layer is removed by a chemical and mechanical polishing method such that an embedded wiring is formed in each of the contact hole and the wiring groove.

Electroless plating bath used for forming a wiring of a semiconductor

A layer forming material is a compound which has a structure of six-membered ring coordinated to Cu and containing Si, and of which general formula is represented by the following chemical formula: ##STR1## wherein X.sub.1 and X.sub.2 are elements of the VI group of the same or different types which are coordinate-bonded to Cu, and of which examples include O, S, Se, Te and the like, at least one of Y.sub.1, Y.sub.2 and Y.sub.3 is Si, L is a group which has a double or triple bond and which is able to supply electrons to Cu, and each of R.sub.1 and R.sub.2 is any of SiF.sub.3, SiH.sub.3, CF.sub.3 and CH.sub.3 for example.

Growing community of inventors

Osaka, Japan

Akemi Kawaguchi