Wells Fargo Bank, N.a.

Tektronix, Inc.

Teseda Corporation

Ajit M Limaye

Paul Vittimberga

Simone Olivia Harvey

Adnan Khan

Evelyn Ujanen

Eric David Greene

Bipin M Sahni

Darius A Miranda

Andrew L Martinez

Peter H Decher

Steven R Morris

Andrew H Levy

David S Kellerman

Garrett S Weiss

Horst R Niehaus

Christy Wang

A mobile device includes a processing circuit and a network interface structured to communicate data over a network. The mobile device generates and transmits a request to register for an alert program to a remote computing system and the mobile device renders a registration interface comprising a prompt asking permission to access user activity information. In response to receiving permission, the mobile device transmits an indication of approval to a remote computing system. After transmitting approval, the mobile device transmits an instance of the user activity information to the remote computing system. In response to sending the instance, the mobile device receives and implements a time-limited budget restriction on a user payment account where the time-limited budget restriction is based at least in part on the instance of the user activity.

Overspending alert system

A computer-implemented method performed by a computing system includes gathering payment history data for a payment account, held by a customer with an accounts provider, by at least one of data mining the payment history data from a database associated with the accounts provider or screen scraping the payment history data, wherein the payment account is associated with payment information. The method also includes identifying a subset of the payment history data that relates to online payments, analyzing the subset of the payment history data to identify characteristics of the online payments made from the payment account, and, based on the characteristics, determining one or more third parties that are likely storing the payment information. The method further includes displaying a list of the one or more third parties to the customer.

Systems and methods for payment information access management

A financial institution computing system includes a network interface structured to communicate data over a network, a user database configured to store information to a plurality of users, and a processing circuit comprising a processor and a memory. The memory is structured to store instructions that are executable by the processor and cause the processor to retrieve a user transaction history associated with the user payment account from the user database, determine a baseline level of user spending based on the user transaction history, receive, by the network interface, user activity information pertaining to the user, determine that the received user activity information is indicative of a predetermined level of user spending relative to a baseline level of user spending, and transmit, by the network interface, an alert to a user computing device associated with the user responsive to the determination.

A design for test focused tester has a single printed circuit board tester architecture. By focusing on design for test testing and eliminating functional testing, the design for test focused tester reduces or eliminates requirements for high speed, precision signal formatting and timing circuitry that require a multiple board architecture interconnected via a high speed backplane. The single board architecture places a vector sequencer and vector memory close to the device under test, which provides short, consistent signal paths to the device and eliminates the need for dead cycles and synchronization between tester boards.

Single board DFT integrated circuit tester

A modular tester architecture allows end-users to mix-and-match scan chain modules and clock driver modules. Modules are interconnected via a synchronization bus allowing the test modules to synchronize with each other so that each can perform its portion of the overall test at the proper time in relation to the testing performed by other modules. The modules can include a BIST driver module, a data acquisition module, networking interface modules, a controller module, a current measurement module, and a DC parametrics module, among others.

Tester architecture for testing semiconductor integrated circuits

An audio/video processing engine that is programmable for processing digital video and digital audio simultaneously, either in parallel or concurrently, has an audio/video I/O processor that communicates with a single programmable hardware processor having reconfigurable logic blocks. The single programmable hardware processor communicates with both a general purpose processor and an optional digital signal processor for adjunct processing. The general purpose processor has a flash memory for initializing the programmable elements of the audio/video processing engine and has data links for remote accessing for programming, control and monitoring. The flash memory is accessible by the single programmable hardware processor, and may be reloaded remotely via the general purpose processor.

Audio/video processing engine

A data file containing metadata and/or control data is synchronized with associated audio/video data by subliminally embedding a key in a frame of the audio/video. The key indicates the location of the data file and a time after the embedded frame in which the data file is to be activated to be in synchronism with the audio/video. The data file is accessed via an alternate channel and held in a buffer until the time indicated by the key. The metadata from the data file is played out for display in synchronism with the associated audio/video data, and instructions contained in the control data are executed in synchronism with the associated audio/video data.

Growing community of inventors

Hillsboro, OR, United States of America

Ajit M Limaye