Qualcomm Incorporated

Ajit B Patil

Dexter Tamio Chun

Oliver Michaelis

Rajeev Prabhakaran

Arshad Bebal

Tarun Reddy Karra

Tom Kuo

Cuneyt Fitoz

Dwight Gordon

Yu-Hsiang Huang

Ian Huang

Jason Chan

Laura Yuan

Timothy Gold

Tarun Karra

Techniques for performing progressive boot to reduce perceived boot time for a wireless device are described. Program codes to be stored in a bulk non-volatile memory may be partitioned into multiple code images. A first code image may include program codes used to support basic functionality of the wireless device. A second code image may include the remaining program codes. For progressive boot, the first code image may be loaded first from the bulk non-volatile memory. Once the first code image has been loaded, the wireless device may be rendered operational and may appear as functional to a user. While the wireless device is operational, the second code image may be loaded from the bulk non-volatile memory as background task and/or on-demand as needed.

Progressive boot for a wireless device

Techniques to securely boot up an electronics device (e.g., a cellular phone) from an external storage device are described. Secure data (e.g., a hash digest, a signature, a cryptographic key, and so on) is initially retrieved from a non-writable area of an external memory device (e.g., an one-time programmable (OTP) area of a NAND Flash device). A first program (e.g., a boot program) is retrieved from a writable or main area of the external memory device and authenticated based on the secure data. The first program is enabled for execution if authenticated. A second program may be retrieved from the main area of the external memory device and authenticated based on the secure data. The second program is enabled for execution if authenticated. Additional programs may be retrieved and authenticated. Each program may be authenticated using a secure hash function, a digital signature, and/or some other cryptographic technique.

Method and apparatus for securely booting from an external storage device

Techniques for quickly and reliably accessing a memory device (e.g., a NAND Flash memory) with adaptive interface timing are described. For memory access with adaptive interface timing, the NAND Flash memory is accessed at an initial memory access rate, which may be the rate predicted to achieve reliable memory access. Error correction coding (ECC), which is often employed for NAND Flash memory, is then used to ensure reliable access of the NAND Flash. For a read operation, one page of data is read at a time from the NAND Flash memory, and the ECC determines whether the page read from the NAND Flash memory contains any errors. If errors are encountered, then a slower memory access rate is selected, and the page with error is read again from the NAND Flash memory at the new rate. The techniques may be used to write data to the NAND Flash memory.

Robust and high-speed memory access with adaptive interface timing

Growing community of inventors

San Diego, CA, United States of America

Ajit B Patil