Maxim Integrated Products, Inc.

Integrated Device Technology, Inc.

Ajay Kumar Ghai

Viresh Patel

Steven D Cate

Robert A Gubser

Pradip Dhirajlal Patel

Steve Detlev Cate

Tarak A Railkar

Christo Pavel Bojkov

Jitesh Shah

Duane Wilcoxen

Kenneth Astrof

An integrated circuit device includes an integrated circuit substrate having an at least two piece package thereon. The package has a sealed cavity therein and a patterned metal inductor in the cavity. The inductor has at least a first terminal electrically coupled to a portion of the integrated circuit substrate by an electrically conductive via, which extends at least partially through the package. The package, which may include a material selected from a group consisting of glass and ceramics, includes a base and a cap sealed to the base. The metal inductor includes a metal layer patterned on at least one of the cap and base of the package. The base may also include first and second electrically conductive vias therein, which are electrically connected to first and second terminals of the inductor.

Integrated circuit device substrates having packaged inductors thereon

A crystal oscillator fabrication method includes depositing mounting cement onto first and second mounting pads on a substrate to thereby define first and second electrode adhesion bumps. First and second electrodes of a crystal oscillator are electrically connected to the first and second mounting pads by contacting the first and second electrodes to the first and second electrode adhesion bumps and then curing the adhesion bumps. Next, mounting cement is deposited onto the first electrode and onto a portion of the first electrode adhesion bump to thereby define a top electrode adhesion extension. The top electrode adhesion extension is then cured.

Crystal oscillator fabrication methods using dual-deposition of mounting cement and dual-curing techniques

A packaged integrated circuit includes an integrated circuit substrate and a cap bonded to a surface of the integrated circuit substrate. The cap has a recess therein that is at least partially lined with at least one segment of an inductor. This inductor may be electrically coupled to an electrical component within the integrated circuit substrate. In some embodiments, the inductor is patterned to extend along a sidewall and interior top surface of the recess, which extends opposite the integrated circuit substrate. The inductor may include a plurality of arcuate-shaped segments and may be patterned to be symmetric about a center-tapped portion thereof. The cap may also include a magnetic material therein that increases an effective inductance of the inductor relative to an otherwise equivalent cap and inductor combination that is devoid of the magnetic material.

Packaged integrated circuits having high-Q inductors therein and methods of forming same

Proximity sensor devices are described that integrate a light emitting diode with a light sensor assembly in a single, compact package. The proximity sensor devices comprise a substrate having a surface. The light emitting diode and light sensor assembly are mounted to the substrate proximate to the surface. The light emitting diode is configured to emit electromagnetic radiation in a limited spectrum of wavelengths, while the light sensor assembly is configured to detect electromagnetic radiation in the limited spectrum of wavelengths emitted by the light emitting diode. An encapsulation layer is formed on the surface over the light emitting diode and light sensor assembly. A trench is formed in the encapsulation layer to receive electromagnetic radiation blocking material configured to block electromagnetic radiation in the limited spectrum of wavelengths to at least partially mitigate crosstalk between the light emitting diode and the light sensor assembly.

Proximity sensor device

An integrated circuit device includes an integrated circuit substrate having a two piece package thereon. The package has a hermetically sealed cavity therein and a crystal resonator within the cavity. The crystal resonator includes at least one electrode electrically coupled to a portion of the integrated circuit substrate by an electrically conductive via, which extends at least partially through the package. The package may include a material selected from a group consisting of glass and ceramics. The crystal resonator includes a crystal blank and first and second electrodes on first and second opposing sides of the crystal blank. The package includes a base having a recess therein and a cap hermetically sealed to the base. The cap includes first and second electrical traces thereon, which are electrically connected to the first and second electrodes of the crystal resonator.

Integrated circuit device substrates having packaged crystal resonators thereon

Proximity sensor devices are described that integrate a light emitting diode with a light sensor assembly in a single, compact package. The proximity sensor devices comprise a lead frame having a surface. The light emitting diode and light sensor assembly are mounted to the lead frame proximate to the surface. The light emitting diode is configured to emit electromagnetic radiation in a limited spectrum of wavelengths, while the light sensor assembly is configured to detect electromagnetic radiation in the limited spectrum of wavelengths emitted by the light emitting diode. An encapsulation layer is formed on the surface over the light emitting diode and light sensor assembly. A trench is formed in the encapsulation layer to receive electromagnetic radiation blocking material configured to block electromagnetic radiation in the limited spectrum of wavelengths to at least partially mitigate crosstalk between the light emitting diode and the light sensor assembly.

An IC package including one or more z-axis interconnects for performing at least in part the fan-in/fan out interconnection for electrically coupling contacts of semiconductor die to external contacts of the package. The z-axis interconnect comprises a matrix of electrically conducting elements extending from the top to the bottom surface of the interconnect. Each conductive element is internally insulated from other conductive elements of the matrix. The semiconductor contacts may be electrically coupled to separate portions of the matrix by way of electrical connections to the top of the z-axis interconnect. Similarly, the external contacts of the package may be electrically coupled to the same separate portions of the matrix by way electrical connections to the bottom of the interconnect. The z-axis interconnect improves the miniaturization, integration, thermal and electrical performance of IC packages. The z-axis interconnect need not be limited to IC package applications, but may be used to electrically interconnect other configurations.

Electrically conductive matrix for z-axis interconnect

An integrated circuit including solder balls containing an elastic or resilient material core, a hard or rigid shell substantially enclosing the core, and an electrical contact layer substantially enclosing the shell. The elastic or resilient core serves as a stress buffer layer in a wafer level package (WLP) integrated circuit. The elastic or resilient material core may include an organic plastic material, such as a Divinilbenzene cross-linked co-polymer of relatively high resistance. This material has a relatively good elongation property so that it can effectively absorb forces exerted upon the integrated circuit by, for example, the flexing of a printed circuit board (PCB) or other structure to which the integrated circuit is attached. The hard or rigid shell serves to contain the elastic or resilient core and may include copper. The electrical contact layer serve to provide a good adhesive electrical contact to an under bump metallization (UBM) layer, may include a lead free, Tin-Gold (SnAg) material.

Wafer level package integrated circuit incorporating solder balls containing an organic plastic-core

IC package structures for high power dissipation and low RDSon. The package can be considered an inverted QFN package typically manufactured from a double etched lead frame that is then formed (stamped) to receive the electronic devices for connection and wire bonding to the lead frame leads, followed by potting and dicing. Using a split paddle allows the packaging of multiple, electrically isolated power devices. The package is particularly advantageous for packaging vertical power MOSFET devices. Various embodiments are disclosed.

IC package structures for high power dissipation and low RDSon

A lead frame to support a semiconductor die within an encapsulating package. The lead frame includes a first rail and a second rail in a first plane, with the second rail parallel to and spaced apart from the first rail by more than the length of the package. A first bar and a second bar are connected perpendicularly to the first and second rails, with the second bar spaced apart from the first bar by more than the width of the package. A lead is connected perpendicularly to the first bar with an unconnected lead end extending toward the second bar and located to extend under the supported semiconductor die. A first support tab is connected perpendicularly to the first rail with a first unconnected tab end extending toward the second rail and located to extend under the supported semiconductor die. A second support tab is connected perpendicularly to the second rail with a second unconnected tab end extending toward the first rail and located to extend under the supported semiconductor die.

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San Jose, CA, United States of America

Ajay Kumar Ghai