International Business Machines Corporation

Ahmed Sayeed Shah

Sarah Huffsmith Knickerbocker

Harry David Cox

Dinesh Gupta

John Joseph Garant

Jason Lee Frankel

Hsichang Liu

James C Utter

Kenneth A Bird

Paul G McLaughlin

Jeffrey A Brody

John A Trumpetto

Charles Timothy Ryan

Myra Muth Boenke

Edward J Hassdenteufel, Iii

Michael John Matts

Richard C Steger

Evelyn Barrington

Lorraine Di Piero-Simmonds

A screening mask having a stress-relieving area including an inner functional area having a pattern which is replicated on an underlying substrate, the inner functional area pattern having an one open area through which a paste is extruded and at least one tab, and an outer nonfunctional area distinct from the inner functional area, the outer nonfunctional area having a stress-relieving area adjacent to an edge of the screening mask that protects the at least one tab in the inner functional area from breaking.

Screening mask having a stress-relieving area

A universal substrate includes an input/output (I/O) layer having a fixed I/O assignment of I/O locations for connection with a printed circuit board or the like. A chip receiving layer is provided for receiving one of at least two different but allied semiconductor chips, wherein each of the at least two different but allied chips include a set of bond pads and have a unique wire-out requirement. A first layer includes a plurality of bond pads and vias, the plurality of bond pads including at least two sets of bond pads, wherein each set is adapted for bond connection with a respective one of the at least two different semiconductor chips when received by said receiving means and further in accordance with a respective wire-out requirement. A second layer, different from the first layer, includes redistribution lines for coupling the plurality of bond pads and vias of the first layer to the I/O locations of the I/O layer in accordance with the wire-out requirements of the at least two different semiconductor chips and the fixed I/O assignment.

Universal cost reduced substrate structure method and apparatus

An improved mask for screening a conductive paste onto a microelectronic substrate is disclosed. The mask comprises a metal foil having a thickness of less than about 200 microns, having a stencil formed in the foil and extending inwardly to a first depth from a first exterior surface of the foil, said stencil comprising a plurality of voids corresponding to the desired pattern, and having a mesh formed in the foil and extending inwardly to a second depth from a second exterior surface of the foil opposite said first exterior surface, said mesh comprising a plurality of voids in communication with the voids of the stencil, wherein the ratio of said first depth to said second depth is less than 60:40, and wherein the mask is produced from an essentially homogenous metal sheet. Such masks are useful for fabricating microelectronic substrates having screened lines of conductive paste.

Reduced cavity depth screening stencil

Growing community of inventors

Wappingers Falls, NY, United States of America

Ahmed Sayeed Shah