Globalfoundries Inc.

Ahmed Mohyeldin

Luigi Capodieci

Vito Dai

Piyush Pathak

Swamy Muddu

Rani Abou Ghaida

A process and apparatus are provided for automated pattern-based semiconductor design layout correction. Embodiments include: determining a portion of a layout of an IC design, the portion comprising a first pattern of a plurality of routes connecting a plurality of design connections; determining one or more sets of the plurality of design connections based on the plurality of routes; and determining, by a processor, a second pattern of a plurality of routes connecting the plurality of design connections within the portion based on the one or more sets.

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San Jose, CA, United States of America

Ahmed Mohyeldin