Qualcomm Incorporated

Ahmed A Youssef

Li-chung Chang

Gurkanwal Singh Sahota

Rishubh Khurana

Ehab Abdel Ghany

Lindsey Makana Kostas

Viral Ranpara

Sergey Murashov

Francisco Ledesma

Ming Leung

Shahnaz Shirazi

Enrique De La Rosa

Zhang Jin

Sherif Abdelhalem

Li-Chung Chang

Ehab A Abdel Ghany

Certain aspects of the present disclosure provide techniques and apparatus for calibrating radio frequency (RF) circuits using machine learning. One example method generally includes calibrating a first subset of RF circuit calibration parameters. Values are predicted for a second subset of RF circuit calibration parameters based on a machine learning model and the first subset of RF circuit calibration parameters. The second subset of RF circuit calibration parameters may be distinct from the first subset of RF circuit calibration parameters. At least the first subset of RF circuit calibration parameters is verified, and after the verifying, at least the first subset of RF circuit calibration parameters are written to a memory associated with the RF circuit.

Machine learning-based radio frequency (RF) front-end calibration

Techniques for providing a receiver front end supporting carrier aggregation with gain alignment and improved matching across modes. In an aspect, auxiliary circuitry is configurable to selectively enable or disable mutual coupling between a source degeneration inductor of an LNA input transistor and an auxiliary inductor. A negative turns ratio coupling is provided between the inductors, such that the effective inductance of the source degeneration inductor is lowered when mutually coupled to the auxiliary inductor. In a non-carrier aggregation (non-CA) mode, the auxiliary inductor is disabled, while in a carrier aggregation (CA) mode, the auxiliary inductor is enabled. In this manner, using a single transistor, gain alignment across non-CA and CA modes is achieved. Furthermore, matching is preserved across non-CA and CA modes using a single external matching component.

Receiver front end for carrier aggregation

Techniques for providing low-cost and effective jammer rejection for a radio receiver. In an aspect, a notch filter is provided between a transformer and a differential mixer in the receiver. The notch frequency of the notch filter may be selected to correspond to an expected jammer frequency to effectively attenuate the jammer signal prior to down-conversion mixing by the mixer. The notch filter may be implemented using various techniques, e.g., an L-C combination having adjustable capacitance, and/or elliptic or Chebyshev filters.

Transformer with integrated notch filter

Amplifiers with configurable mutually-coupled source degeneration inductors are disclosed. In an exemplary design, an apparatus (e.g., a wireless device or an integrated circuit) includes a gain transistor and a plurality of inductors, which may implement an amplifier. The gain transistor receives an input signal and provides an amplified signal. The plurality of inductors are mutually coupled, are coupled to the gain transistor, and provide a programmable source degeneration inductance for the gain transistor. The inductors may have a positive coupling coefficient and may provide a larger source degeneration inductance. Alternatively, the inductors may have a negative coupling coefficient and may provide a smaller source degeneration inductance.

Amplifiers with configurable mutually-coupled source degeneration inductors

Amplifiers with inductive degeneration and configurable gain and input matching are disclosed. In an exemplary design, an apparatus includes a gain transistor, an inductor, and an input matching circuit for an amplifier. The gain transistor has a variable gain determined based on its bias current. The inductor is coupled between the gain transistor and circuit ground. The input matching circuit is selectively coupled to the gain transistor based on the variable gain of the gain transistor. For example, the input matching circuit may be coupled to the gain transistor in a low-gain mode and decoupled from the gain transistor in the high-gain mode. In an exemplary design, the input matching circuit includes a resistor, a capacitor, and a second transistor coupled in series. The resistor is used for input matching of the amplifier. The second transistor couples or decouples the resistor to or from the gain transistor.

Amplifiers with inductive degeneration and configurable gain and input matching

Multi-output amplifiers with configurable source degeneration inductance and having good performance are disclosed. In an exemplary design, an apparatus (e.g., a wireless device or an integrated circuit) includes a gain transistor and a configurable degeneration inductor for an amplifier. The gain transistor receives an input signal and provides an amplified signal. The amplifier provides a single output signal in a first operating mode or a plurality of output signals in a second operating mode. The configurable degeneration inductor is coupled to the gain transistor and provides a first source degeneration inductance in the first operating mode or a second source degeneration inductance in the second operating mode. The second source degeneration inductance is less than the first source degeneration inductance and may be dependent on the number of output signals generated in the second operating mode.

Amplifiers with multiple outputs and configurable degeneration inductor

Split amplifiers with configurable gain and linearization circuitry are disclosed. In an exemplary design, an apparatus includes first and second amplifier circuits and a linearization circuit, which may be part of an amplifier. The first and second amplifier circuits are coupled in parallel and to an amplifier input. The linearization circuit is also coupled to the amplifier input. The first and second amplifier circuits are enabled in a high-gain mode. One of the first and second amplifier circuits is enabled in a low-gain mode. The linearization circuit is enabled in the second mode and disabled in the first mode. The amplifier is split into multiple sections. Each section includes an amplifier circuit and is a fraction of the amplifier. High linearly may be obtained using one amplifier circuit and the linearization circuit in the low-gain mode.

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San Diego, CA, United States of America

Ahmed A Youssef