Skhynix Inc.

Ahmad Golmohammadi

Fan Zhang

Meysam Asadi

A memory system having a memory block and a memory controller in communication with the memory block. The memory controller is configured to: decode codewords in the memory block; determine failed codewords based on one or more parity checks including a chipkill parity; and turbo-decode the failed codewords using at least two decoders in a feedback loop with adders prior to each decoder for scaling soft decode information prior to subsequent decoding of the failed codewords.

Data recovery with enhanced super chip-kill recovery and method of operating such memory system

A memory system having a memory block and a memory controller in communication with the memory block. The memory controller is configured to: decode codewords from the memory block, identify failed codewords from the decoded codewords, estimate raw bit errors RBERs of the failed codewords, sort failed codewords from a failed sector of the memory block in order from a first set of the failed codewords in the failed sector having a higher probability of being successfully decoded to a second set of the failed codewords in the failed sector having a lower probability of being successfully decoded, and perform a super chip kill SCK operation on one of the failed codewords in the first set to produce a recovered codeword.

Growing community of inventors

San Jose, CA, United States of America

Ahmad Golmohammadi