Nxp B.v.

Nxp Usa, Inc.

Ahmad Dashtestani

Siamak Delshadpour

Shufan Chan

Yue Jing

Mona Ganji

One example discloses a power application circuit, including: a first power application circuit, configured to receive an enable signal and a first voltage; wherein the first power application circuit is configured to output the first voltage at a first current after a first delay from when the enable signal is received; and a second power application circuit, configured to receive the enable signal and a second voltage; wherein the second power application circuit is configured to output the second voltage at a second current after a second delay from when the enable signal is received.

Power application circuit

Various embodiments relate to a protection circuit, comprising: a pad configured to input an external voltage from a connector; a first circuit branch connected to the pad and configured to receive a fast ramp-up over voltage at the pad; a second circuit branch connected to the pad and configured to receive a ramp-up over voltage at the pad; a third circuit branch connected to the pad and configured to output an over voltage detection signal when an over voltage is received at the pad, wherein the third circuit branch includes a voltage divider with a variable resistor with a variable voltage node and an enable switch; and a logic circuit including an enabling transistor configured to control the variable resistor and the enable switch.

Over voltage detection and protection

A voltage detection circuit including an input voltage stage configured to scale down an input voltage to produce a scaled down voltage, a gain loss stage configured to receive and adjust the scaled down voltage based on a determined gain or loss to be applied to the scaled down voltage, and a comparison circuit configured to determine if the input voltage is over or under a desired voltage value.

Voltage detection circuit

An over-voltage protection circuit and method may include a pass gate and a voltage boosting circuit for providing protection to start-up voltage-sensitive circuits during start-up conditions of a system including the voltage-sensitive circuits. The pass gate may include a drain, source, and gate, with the drain configured to receive an input signal and the source configured to output the input signal, in response to a pass gate driving voltage signal applied to the gate of the pass gate. The voltage boosting circuit may include an output coupled to the gate of the pass gate, the voltage boosting circuit configured to generate a pass gate driving voltage on the output. The voltage boosting circuit further configured to passively control the pass gate driving voltage to a level less than a steady-state voltage level during start-up of the protection circuit.

Charge pump overshoot prevention for gate drivers

Embodiments of a circuit for controlling DC offset error for an inductor current ripple based, constant-on time DC-DC converter are disclosed. The circuit includes a ripple generation circuit coupled to a reference voltage input and to a sense voltage input, and having a reference voltage output to form a main loop. The circuit also includes a DC error correction circuit connected between the reference voltage input and the sense voltage input, and the reference voltage output of the ripple generation circuit. The DC error correction circuit includes a coarse DC error correction loop coupled between the sense voltage input and the reference voltage output and a fine DC error correction loop coupled between the reference voltage input and the reference voltage output. A method for controlling DC offset error for an inductor current ripple based, constant-on time DC-DC converter, is also disclosed.

DC offset correction for inductor current ripple based, constant-on-time DC-DC converters

Embodiments of a circuit for use with a DC-DC converter are disclosed. In an embodiment, a circuit for controlling frequency variation for a ripple based, constant-on time DC-DC converter, is discloses. The circuit includes a set/reset (SR) latch, a comparator configured to set the SR latch, and an on-time and frequency variation controller configured to reset the SR latch. The on-time and frequency variation controller includes a feedback loop configured to increase the rate at which a ramp voltage increases to reduce the time it takes for the ramp voltage to exceed a threshold voltage. Embodiments of a method for controlling frequency variation for a ripple based, constant-on time DC-DC converter are also disclosed.

Growing community of inventors

Scottsdale, AZ, United States of America

Ahmad Dashtestani