Koninklijke Philips Corporation N.V.

U.S. Philips Corporation

Adwin Hugo Timmer

Jeroen Anton Johan Leijten

Jozef L Van Meerbergen

Jozef Louis Van Meerbergen

Jeroen A J Leijten

Fran&ccedil;oise Jeannette Harmsze

Jeroen A Leijten

A data processor has a cache memory with an associative memory for storing at least a first and second groups of associations between a respective main memory addresses and cache memory locations. At least one cache memory location is dynamically assignable to different ones of the groups for use in associations of the assigned group. When an instruction indicates a main memory address a group is selected group for finding the cache memory location associated with the main memory address. In an embodiment, the processor accesses streams of addresses from iteratively computed main memory addresses. Each stream has its own group of associations of addresses from the stream with cache memory locations assigned to that group. The remaining cache memory locations are accessed with set associative mapping. Thus, cache memory locations can be assigned to different streams on an &ldquo;as needed&rdquo; basis and the remaining cache memory locations can be used for non-stream addresses.

Data processor utilizing set-associative cache memory for stream and non-stream memory addresses

A signal processing device contains a plurality of processing elements with inputs and outputs coupled via a switch-matrix for communication of signal streams between a set of processes. An arbiter selects the connections made by the switch-matrix. The arbiter makes allocations of inputs and outputs that are to be connected to each other in each of successive time-slots. The allocations for communication of signal streams between the set of processes for a plurality of time-slots are made in advance. The arbiter can also receive requests for making further connections between inputs and outputs. In that case, the arbiter makes said further connection in a time-slot in which the requested inputs and outputs are not used by the set of processes. A method of planning is provided which ensures that full utilization of the switch-matrix is possible.

Signal processing device and method of planning connections between processors in a signal processing device

Distributed digital signal processing is executed by a number of processing elements. Signal processing processes are scheduled for individual processing elements according to the data flow principle. To this end, the flow of signal samples is subdivided into data tokens, each of which has several samples. A process is started in a processing element in response to the detection of a data token presented so as to undergo the process. The detection is processed by a control unit which, in response thereto, allocates a communication connection between a first processing element producing the relevant data token and a second processing element which is to process the data items present in the data token. Scheduling is thus achieved by allocation of the communication connection. Furthermore, in order to avoid deadlock problems, restrictions are imposed as regards the execution sequence of processes.

Signal processing device

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Eindhoven, Netherlands

Adwin Hugo Timmer