Discovision Associates

Lsi Corporation

Lsi Logic Corporation

Idex Biometrics Asa

Other

Pts Corporation

Inmos Limited

Air Semiconductor, Ltd.

Adrian Philip Wise

Martin William Sotheran

William P Robbins

Helen Rosemary Finch

Kevin J Boyd

Anthony Mark Jones

Kevin D Dewar

Nicholas Birch

Anthony M Jones

Anthony Peter J Claydon

Anthony Peter Claydon

David Andrew Barnes

Mark Barnes

Andrew Peter Kuligowski

Colin Smith

Donald William Patterson

James A Darnes

Nigel Peter Topham

David P Tester

Peter Eckehard Kollig

Keith Ahluwalia

Anthony Peter John Claydon

Richard M Forsyth

Kevin Douglas Dewar

Donald W Walker Patterson

Jonathan Michael Harris

Anthony Peter J Clayton

Anothy Peter Claydon

James Darnes

A two-wire interface () for connecting a first device () and a second device (). The two-wire interface () is operable in a handshaking mode and a data transfer mode. In the handshaking mode the first wire () of the interface () is driven by the first device () and the second wire () of the interface () is driven by the second device () so that the first () and second () devices can perform a handshaking sequence. In the data transfer mode one of the first wire () and the second wire () is driven by one of the first () and second () devices to provide a clock signal, and the other wire is driven by either the first device () or the second device () depending which device is transmitting data. Accordingly, the two-wire interfaces () are operable in two modes (e.g. handshaking mode and data transfer mode) and one of the wires () of the interface () may be driven by a different device in the two modes.

Two-wire host interface

A device for communication with a terminal. The device comprises: a communication unit for communicating with the terminal; a biometric unit comprising a biometric sensor for sensing biometric data; contacts for connecting the device to the terminal; a first physical interface between the biometric unit and the contacts configured to enable contact communication between the biometric unit and the terminal; and a second physical interface between the communication unit and the biometric unit configured to enable contact communication between the communication unit and the biometric unit. The device is configured such that all contact communications between the terminal and the communication unit are routed through the biometric unit via the first and second physical interfaces.

Biometric interface

A method for protecting data between a circuit and a memory is disclosed. The method generally includes the steps of (A) generating a particular address among a plurality of addresses for accessing a particular area among a plurality of areas in the memory, (B) determining a particular key among a plurality of keys associated with the particular area, (C) generating a cipher stream from both the particular address and the particular key and (D) modifying a data item with the cipher stream such that the data item is encrypted during a transfer between the circuit and the memory.

Memory encryption for digital video

An apparatus comprising a memory and a coder/decoder circuit. The memory may have a first memory portion and a second memory portion. The coder/decoder circuit may be configured to (i) position a set of atoms across the memory, (ii) define a strip across a portion of the atoms, (iii) designate a first atom within the strip, (iv) locate one or more second atoms to be paired with the first atom, (v) determine whether the one or more second atoms when paired with the first atom forms a legitimate pair, and (vi) read the legitimate pair from the first memory portion and the second memory portion.

System for interleaved storage of video data

A pipeline video decoder and decompression system handles a plurality of separately encoded bit streams arranged as a single serial bit stream of digital bits and having separately encoded pairs of control codes and corresponding data carried in the serial bit stream. The pipeline system employs a plurality of interconnected stages to decode and decompress the single bit stream, including a start code detector. When in a search mode, the start code detector searches for a specific start code corresponding to one of multiple compression standards. The start code detector responding to the single serial bit stream generates control tokens and data tokens. A respective one of the tokens includes a plurality of data words. Each data word has an extension bit which indicates a presence of additional words therein. The data words are thereby unlimited in number. A token decode circuit positioned in certain of the stages recognizes certain of the tokens as control tokens pertinent to that stage and passes unrecognized control tokens to a succeeding stage. A reconfigurable decode and parser processing means positioned in certain of the stages is responsive to a recognized control token and reconfigures a particular stage to handle an identified data token. Methods relating to the decoder and decompression system include processing steps relating thereto.

Multistandard video decoder and decompression system for processing encoded bit streams including start code detection and methods relating thereto

A method to reduce power consumption in a device is disclosed. The method generally includes the steps of (A) generating a plurality of pseudorange signals by tracking a plurality of position signals received from a plurality of satellites in a positioning system, at least one of the position signals from each one of the satellites respectively, (B) calculating both an initial position and an initial time bias from the pseudorange signals using a processing capability of the device at a normal capacity and (C) calculating both an updated position and an updated time bias using the processing capability reduced to a first capacity, wherein the first capacity (i) consumes less power than the normal capacity and (ii) is suitable to process the updated position and the updated time bias using a limited number comprising less than all of the pseudorange signals.

PVT optimization architecture for always-on GPS receivers

A method for reading atoms positioned within a memory having a first memory portion and a second memory portions, comprising the steps of (a) positioning the atoms having memory addresses across the memory, (b) defining a strip across a portion of the atoms, (c) designating a first atom within the strip, (d) locating one or more second atoms to be paired with the first atom, (e) determining whether the one or more second atoms when paired with the first atom forms a legitimate pair, and (f) reading the legitimate pair from the first memory portion and the second memory portion.

Multistandard video decoder and decompression system for processing encoded bit streams including a video formatter and methods relating thereto

A pipeline video decoder and decompression system handles a plurality of separately encoded bit streams arranged as a single serial bit stream of digital bits and having separately encoded pairs of control codes and corresponding data carried in the serial bit stream, A reconfigurable decode and parser processing means positioned in certain of the stages is responsive to a recognized control token and reconfigures a particular stage to handle an identified data token.

Multistandard video decoder and decompression system for processing encoded bit streams including a reconfigurable processing stage and methods relating thereto

Multistandard video decoder and decompression system for processing encoded bit streams including start codes and methods relating thereto

A pipeline video decoder and decompression system handles a plurality of separately encoded bit streams arranged as a single serial bit stream of digital bits and having separately encoded pairs of control codes and corresponding data carried in the serial bit stream. The pipeline system employs a plurality of interconnected stages to decode and decompress the single bit stream, including a start code detector. When in a search mode, the start code detector searches for a specific start code corresponding to one of multiple compression standards. The start code detector responding to the single serial bit stream generates control tokens and data tokens. A respective one of the tokens includes a plurality of data words. Each data word has an extension bit which indicates a presence of additional words therein. The data words are thereby unlimited in number. A token decode circuit positioned in certain of the stages recognizes certain of the tokens as control tokens pertinent to that stage and passes unrecognized control tokens to a succeeding stage. A reconfigurable decode and parser processing means positioned in certain of the stages is responsive to a recognized control token and reconfigures a particular stage to handle an identified data token. Methods relating to the decoder and decompression system include processing steps relating thereto

Multistandard video decoder and decompression system for processing encoded bit streams including pipeline processing and methods relating thereto

Multistandard video decoder and decompression system for processing encoded bit streams including a decoder with token generator and methods relating thereto

Multistandard video decoder and decompression system for processing encoded bit streams including a standard-independent stage and methods relating thereto

Method and apparatus for decoding video data

A memory interface for connecting a bus to memory comprises an input, a buffer, an address input, a generator, and a writer. The input receives a plurality of data words from the bus. The buffer buffers the data words received from the bus. The address input receives from the bus addresses associated with the plurality of data words. The generator generates a series of addresses in the memory into which the buffered data words may be written. The series of addresses are derived from the received addresses. The writer writes the buffered data words into the memory at the generated addresses.

Memory interface for reading/writing data from/to a memory

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Bracknell, United Kingdom

Adrian Philip Wise