Zetex Plc

Zetek Plc

Adrian David Finney

David Neil Casey

Peter Blair

Andrew Wood

David Mottram

Paul Gerrard

A temperature dependent switching circuit comprises a first transistor with a threshold voltage Vth having a negative temperature coefficient. A diode having a forward voltage drop with a negative temperature coefficient coupled with its anode connected to the drain of the first transistor and its cathode connected to the gate of the first transistor. A first resistor is coupled between a power supply terminal and the drain of the first transistor. A low voltage supply is terminal connected to the source of the first transistor. A second resistor is coupled between the gate of the first transistor and the low voltage supply terminal. A switching transistor has its source connected to the low voltage supply terminal and its gate coupled to the drain of the first transistor. The drain of the first transistor provides a voltage with a negative temperature coefficient equal to the sum of the forward voltage drop across the diode and the threshold voltage of the first transistor. As the temperature in the circuit rises to a predetermined temperature the voltage at the gate of the switching transistor drops below the threshold voltage for the switching transistor turning off the current flowing from the drain to the source of the switching transistor.

Temperature dependent switching circuit

A temperature independent low voltage reference circuit comprises a first transistor with a threshold voltage Vth having a negative temperature coefficient. A diode having a forward voltage drop with a negative temperature coefficient coupled with its anode connected to the drain of the first transistor and its cathode connected to the gate of the first transistor. A first resistor coupled between a power supply terminal and the drain of the first transistor. A low voltage supply terminal connected to the source of the first transistor. A second resistor coupled between the gate of the first transistor and the low voltage supply terminal. The drain of the first transistor provides a voltage with a negative temperature coefficient equal to the sum of the forward voltage drop across the diode and the threshold voltage of the first transistor. A circuit providing a voltage with a positive temperature coefficient is coupled between the drain of the first transistor and the low voltage supply terminal and has an output terminal. The positive temperature coefficient balances said negative temperature coefficient so that the voltage at said output has a temperature coefficient of zero.

Temperature independent low voltage reference circuit

A high side switching circuit, comprising: a switching transistor; a charge pump drive circuit including a circuit for generating an oscillating signal; and a charge pump arranged to provide a gate drive voltage to the switching transistor in response to a control signal; wherein the charge pump is driven by the charge pump drive circuit, and the circuit for generating an oscillating signal comprises: an oscillator having a power supply input and first and second outputs, outputting first and second pulse trains respectively of the same frequency but out of phase such that when the first pulse train is high, the second pulse train is low and when the second pulse train is high, the first pulse train is low; first and second transistors connected in series with the drain of the first transistor connected to a high voltage input relative to the high level of the first and second pulse train pulses, the source of the first transistor connected to the drain of the second transistor, the source of the second transistor connected to a voltage input less than or equal to the low level of the first and second pulse train pulses, the gate of the first transistor being connected to the first output of the oscillator and the gate of the second transistor being connected to the second output of the oscillator; and an output terminal connected to the source of the first transistor thereby outputting a third pulse train in phase with the first pulse train and providing a current derived from the drain of the first transistor when the first transistor is conducting and sinking a current when the second transistor is conducting; and wherein the switching transistor and first transistor are vertical MOSFETs or IGBTs, said switching and first transistors being provided on a semiconductor substrate having first and second surfaces, such that said switching and first transistors have a common drain contact provided on said second surface of the substrate.

High side switching circuit

A semiconductor device (e.g. MOSFET or IGBT) comprises active and termination regions () formed in a semiconductor substrate (). The substrate () has an upper surface and a termination including a trench () extending into the substrate () from the upper surface within the termination region (). Termination trench () is at least partly filled with an insulating material () which extends from the termination trench () to overlie adjacent regions of the device above the surface. A channel stop region () extends laterally from a side wall of the termination trench () into the substrate ().

Termination structure for a semiconductor device

A method for implanting ions into a surface of a semiconductor structure covered by a layer of insulating material, for example into a trench wall covered by a layer of oxide. A beam of ions is directed at a glancing angle to the layer of insulating material such that a substantial proportion of ions which are implanted into the semiconductor structure surface are scattered from the beam by the layer of insulating material. It is possible therefore to implant ions into a trench wall without requiring a beam source arranged to deliver a beam at a large angle to the trench wall surface.

Implantation method

A current-limit circuit comprising a control transistor coupled to a power transistor in a current mirror configuration. A switch transistor is operatively coupled between the output of the power transistor and the control transistor to selectively activate the control transistor in response to an over current condition detected by a defect transistor. Current drawn through the power transistor in the over current condition is limited by the control transistor which is powered from the gate of the power transistor. The power and detect transistors are integrated on a semi-conductor substrate of a first conductivity type defining first and second surfaces. An array of adjacent transistor body regions of a second conductivity type provided adjacent said first surface with gate electrodes extending between adjacent body regions and insulated therefrom by a gate insulator layer. Transistor source regions of said first conductivity type are provided in said body regions adjacent said gate electrodes. Transistor source electrode material overlies the gate electrodes and is insulated therefrom by an insulation layer, the source electrode material contacting the source/body regions between adjacent gate electrodes. The source electrode layer is patterned to define first and second adjacent regions providing source contact to the power and detect transistors respectively. Electrodes of the power transistor are isolated from adjacent gate electrodes of the detect transistor by intervening body regions devoid of source regions adjacent one or both of said adjacent gate electrodes.

Current limiting protection circuit

A gated semiconductor device comprising a substrate defining an active surface area including source regions, and a series of gates formed adjacent and insulated from the source regions. A source electrode contacts the source regions. A termination extends around the periphery of the active surface area, The termination comprises a gate electrode and a layer of conductive material electrically connected between the gate electrode and the gates. The layer of conductive material extends to the source electrode and incorporates a series of regions which are alternately N and P type so as to define a series of breakdown diode junctions distributed around the active surface area and interposed between tie gate electrode and source electrode, In normal operation gate current flows through portions of the conductive layer which do not incorporate diode junctions. In the event that the gate/source voltage exceeds a predetermined level, the diode junctions break down, shorting the gate to the source.

Gated semiconductor device

An integrated device is provided which has a bipolar transistor as an output stage. The bipolar transistor is driven by a short channel metal oxide semiconductor field effect transistor. Such a device has a low on state voltage drop substantially irrespective of the potential supported by the device.

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Oldham, United Kingdom

Adrian David Finney