Synopsys, Inc.

Aditya Shiledar

Samit Chaudhuri

Darren Faulkner

Alan Cheuk-Ming Lam

Techniques are disclosed for improving bit slice placement and wiring. Some embodiments include swapping cells to improve routing. An alternative embodiment includes copying wiring from a first bit slice to a second bit slice. Another embodiment includes copying blocks or cells from a first bit slice to a second bit slice. Further, the wiring from the first bit slice may be copied to the second bit slice.

Growing community of inventors

San Jose, CA, United States of America

Aditya Shiledar