Qualcomm Incorporated

Adithya Bhaskaran

Sharad Kumar Gupta

Rahul Sahu

A level-shifting pulse latch is provided for a self-timed memory clock signal for a memory. The level-shifting pulse latch includes a system-power-domain-to-memory-power-domain level-shifter that inverts and level-shifts a system clock signal into an inverted version of the system clock signal. A pass transistor controls whether the inverted version of the system clock signal drives a memory-power-domain latch to produce the self-timed memory clock signal.

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Austin, TX, United States of America

Adithya Bhaskaran