University of Illinois

Adam Watkins

Spyros Tragoudas

Various embodiments of a robust double node upset tolerant latch in which all internal and external nodes are capable of recovering the previous value after a single event upset are disclosed.

Systems and methods for a robust double node upset tolerant latch

Disclosed are a latch circuit and method for preventing double node upsets (DNUs). A first, second, and third storage circuit, each comprising four inputs and an output, are electrically interconnected with a first and second three-input c-element circuit, each comprising three inputs and an output, and a two-input c-element circuit comprising two inputs and an output. The output of the first storage circuit is connected to a first input of the first three-input c-element circuit, a first input of the third storage circuit and a third input of the second storage circuit. The output of the second storage circuit is connected to a second input of the first three-input c-element circuit, a first input of the two-input c-element circuit, and a second input of the second three-input c-element circuit. The output of the third storage circuit is connected to a second input of the two-input c-element circuit, a third input of the first three-input c-element circuit and a third input of the second three-input c-element circuit.

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Carbondale, IL, United States of America

Adam Watkins