Nexperia B.v.

Other

Adam Richard Brown

Ricardo Lagmay Yandoc

Dagobert Michel De Leeuw

Edsko E Havinga

Phil Rutter

Saurabh Pandey

Manoj Balakrishnan

Arnel Biando Taduran

Jim Brett Parkin

Colin P Jarrett

Steven Waterhouse

Anthony Matthew

Reinald John Salazar Roscain

Dave Anderson

Reinald John Roscain

A semiconductor device including a clip, and the clip includes a clip slot, and a slug and the slug includes a groove. The clip and the slug are attached by the ultrasonic welding. The groove and the clip slot are at least partially overlapping to form a gas pathway.

Semiconductor device and a method of manufacturing a semiconductor device

A packaged semiconductor device is provided, including a first semiconductor die on which a first electrical component is integrated that includes a first terminal at a first surface of the first die and a second terminal at a second surface of the first die, a second semiconductor die similar to the first die, with a first surface of the second die facing the first surface of the first die. A first conductive element on the second surface of the first side electrically connected to the second terminal of the first electrical component, a second conductive element is on the second surface of the second die electrically connected to the second terminal of the second electrical component, and a third conductive element between the first surfaces of the first and the second die. The first terminals of the first and second electrical components are electrically connected through the third conductive element.

Multi-chip packaged semiconductor device

This disclosure relates to a lead frame assembly for a semiconductor device, a semiconductor device and an associated method of manufacture. The lead frame assembly includes a die attach structure and a clip frame structure. The clip frame structure includes a die connection portion configured to contact a contact terminal on a top side of the semiconductor die; and a continuous lead portion extending along the die connection portion. The continuous lead portion is integrally formed with the die connection portion.

Lead frame assembly for a semiconductor device

The disclosure relates to a lead frame assembly for a semiconductor device, the lead frame assembly including: a die attach structure and clip frame structure. The clip frame structure includes: a die connection portion configured to contact to one or more contact terminals on a top side of the semiconductor die; one or more electrical leads extending from the die connection portion at a first end, and a lead supporting member extending from a second end of the one or more leads; and a plurality of clip support members arranged orthogonally to the one or more electrical leads. The plurality of support members and the lead supporting member are configured to contact the die attach structure. The present disclosure also relates a die attach structure and clip frame structure for a semiconductor device, a semiconductor device including the same and a method of manufacturing the semiconductor device.

The present disclosure relates to a lead frame assembly for a semiconductor device. The leadframe assembly includes a clip frame structure with a die connection portion configured and arranged for contacting to one or more contact terminals on a top side of a semiconductor die; and one or more electrical leads extending from the die connection portion at a first end. The die connection portion includes a hooking tab extending therefrom configured and arranged to engage with a wire loop of a wire pull test equipment. The disclosure also relates to an interconnected matrix of such leadframe.

Leadframe assembly for a semiconductor device

A field effect transistor semiconductor device having a compact device footprint for use in automotive and hot swap applications. The device includes a plurality of field effect transistor cells with the plurality of transistor cells having at least one low threshold voltage transistor cell and at least one high threshold voltage transistor cell arranged on a substrate. The field effect transistor semiconductor device is configured and arranged to operate the at least one high threshold voltage transistor cell during linear mode operation, and operate both the low threshold voltage transistor cell and the high threshold voltage transistor cell during resistive mode operation. Further provided is a method of operating field effect transistor semiconductor device including a plurality of field effect transistor cells that includes at least one low threshold voltage transistor cell and at least one high threshold voltage transistor cell.

Semiconductor device and method of operation for low and high threshold voltage transistors

The invention relates to a write-once read-many memory element (1), or an assembly thereof, which comprises a substrate on which electrodes are provided and between which a layer is sandwiched, which memory element includes a conjugated polymer or oligomer as well as a dopant. This memory element can be written by temporarily applying a sufficiently high voltage to the electrodes so that the electroconductivity of the layer is permanently reduced.

Growing community of inventors

Nijmegen, Netherlands

Adam Richard Brown