Hamilton Sundstrand Corporation

Adam Michael White

Mustansir Kheraluwala

Huazhen Chai

Dwight D Schmitt

Ernest Thompson

Richard Andrew Himmelmann

Vietson M Nguyen

Kris H Campbell

Waleed M Said

Frank Z Feng

Charles Patrick Shepard

John Duward Sagona

Christopher J Courtney

Harry Huazhen Chai

Curtis J Plude

Joshua Scott Parkin

Steven A Davidson

Keith R Magnus

Kheraluwala Mustansir

A method of operating a power conversion system including converting variable frequency AC voltage to constant frequency AC voltage by a power converter, setting a first peak current reset threshold above operating currents previously observed during steady state short circuit current regulation in by a controller of the power converter, setting a second peak current reset threshold at a current lower than the previously observed steady state short-circuit regulation point observed during previous operation during steady state short circuit current regulation by the controllers of the power converter, resetting inverter converter AC output regulating voltage to 0 volts, and ramping AC output regulating voltage back up into steady-state operation when the second a peak current reset threshold is exceeded.

Dual threshold overcurrent reset

Embodiments of the invention provide for a system, method, and controller for operating a harmonic regulator with loop delay compensation. Some embodiments include receiving, at a controller, voltage feedback from a power system, and applying a harmonic regulator to each distortion frequency to be compensated. Embodiments also include applying a predetermined delay to an output of the harmonic regulator, scaling the delayed output and adding it to a power source voltage reference waveform, and providing condition power to a load, using the conditioned power source voltage reference waveform.

Harmonic regulator with loop delay compensation

A method of controlling an inverter includes generating a neutral-phase reference waveform, generating a neutral-phase midpoint compensation waveform using the neutral-phase reference waveform, and generating a neutral-phase compensated duty cycle waveform using the neutral-phase midpoint compensation waveform. Neutral-phase switch command signals are generated for switches of a neutral-phase of the inverter using the neutral-phase compensated duty cycle waveform. Inverters and computer program products are also described.

Multilevel inverters and methods of controlling multilevel inverters

A phase leg for a multilevel inverter includes a first direct current lead, an outer solid-state switch, an inner solid-state switch, and a midpoint-clamping device. The outer solid-state switch device is connected to the first direct current lead. The inner solid-state switch is connected in series with the outer solid-state switch. The midpoint-clamping device is a bi-directional current flow device connected between a second DC lead and a node between the inner and outer solid-state switches for reducing conduction losses associated with current flowing through the phase leg.

Solid-state power converters

A system and method for controlling a DC midpoint terminal voltage of a three level inverter is provided. The method includes receiving an input power signal at a three level motor controller system that includes a three level inverter, measuring, using a current sensor in the three level motor controller system, a DC current of the input power signal before the input power signal is provided to the three level inverter, and adjusting a zero-sequence inverter output voltage to adjust a midpoint voltage at the DC midpoint based on the measured DC current.

Three level inverter midpoint control gain correction

A transformer assembly includes a housing with a sealed housing interior, a transformer disposed within the housing interior and having a core with windings wrapped about the core, and a condenser mounted to the housing. The condenser is in fluid communication with the housing interior. A surface of the windings bounds a coolant channel extending between the windings and the condenser to convey coolant of a first phase to the condenser and receive coolant of a second phase from the condenser.

Power converters with immersion cooling

A method of controlling an inverter includes receiving output voltage target waveforms for phases of an inverter, generating uncompensated midpoint duty cycle waveforms for the inverter phases, selecting an uncompensated midpoint duty cycle waveform for one of the inverter phases based on the magnitudes of the uncompensated midpoint duty cycle waveforms, and applying a compensation signal to the selected uncompensated midpoint duty cycle waveform. An inverter controller and inverter employ the method for generating switch command signals for solid-state switch devices of the inverter.

Systems and methods for controlling inverters

A method of controlling an inverter includes receiving a target waveform for output voltage of an inverter phase, calculating a phase bias for an inverter phase using the target waveform, biasing the target waveform using the phase bias, and generating a switching device command signal by comparing the biased target waveform to a carrier waveform. The switching device command signal has a switching patter that reduces midpoint current in an inverter input lead and common mode voltage in an inverter output lead.

A method of converting power includes receiving alternating current (AC) at the first phase leg set of a power conversion system having first and second phase legs sets connected by direct current (DC) leads. The first phase leg set rectifies the received AC power into DC power by switching outer switches of the first phase leg set into an off state. The DC lead conveys the DC power from the first phase leg set to the second phase leg set. The second phase leg set inverts the DC power into AC power.

Power converters for aircraft starter/generators

A phase leg for a multilevel inverter includes a positive DC lead, a first outer MOSFET connected to the positive DC lead, a first inner IGBT connected to the first outer MOSFET, a second inner IGBT connected to the first inner IGBT, and a second outer IGBT connected to the second inner IGBT. The first and second outer MOSFETs are superjunction MOSFETs voltage balanced by the first and second IGBTs for reducing voltage stress in the solid-state switch phase leg when the superjunction MOSFET and the IGBT are conducting current from the DC lead to the AC lead.

Solid-state inverters with voltage-balanced switches

A power converter includes a first set of transistors electrically connected in series, a second set of transistors electrically connected in series, and an AC link. The second set of transistors is electrically connected in parallel with the first set of transistors to form an H-bridge. The AC link is electrically connected between the first and second sets of transistors. A plurality of H-bridges are connected in parallel and a three-wire DC bus is electrically connected to the H-bridges.

Power converters

A method of controlling a rectifier includes receiving a gain factor, receiving a ramp interval, and generating a rectifier switch control voltage. The rectifier switch control voltage is an over-modulated rectifier switch control voltage generated by a pulse width modulator using the gain factor. The amount of over-modulation in the rectifier switch control voltage is decreased during the ramp interval for reducing transient voltage overshoot events at the start of active rectification.

Systems and methods for controlling active rectifiers

A thermal stress reduction method includes ramping an electric power generator to start an aircraft engine, for a time period associated with the aircraft engine start sequence toggling a three-level inverter switch array to a three-level pulse width modulation mode, determining if a first time interval in the three-level pulse width modulation mode exceeded a predetermined three-level pulse width modulation mode interval, in response to the first time interval exceeding the three-level pulse width modulation mode interval, toggling the three-level inverter switch array to a two-level pulse width modulation mode, determining if a second time interval in the two-level pulse width modulation mode exceeded a predetermined two-level pulse width modulation mode interval and in response to the second time interval exceeding the two-level pulse width modulation mode interval, toggling the three-level inverter switch array to the three-level pulse width modulation mode.

Thermal stress reduction in aircraft motor controllers

A system including a motor loss reducing controller system utilizing input band-shifting, an integral control architecture and inverse band-shifting is disclosed. The motor loss reducing controller system may provide correction of harmonic currents flowing to a PM motor from a motor controller. The compensation is added to the PWM voltage command signals. Within a compensator, d-axis and q-axis current feedback signals are frequency shifted down by n times the fundamental frequency. This converts the initial motor stationary harmonic currents into DC values. The frequency shifting is completed by multiplying the feedback signal by sine and cosine carrier signals of the shifted frequency. An integral controller may cancel any component of error at a desired DC value. An inverse frequency-shift transformation is applied to the output of the I controller in order to shift the command output signal back to the original reference frame.

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Belvidere, IL, United States of America

Adam Michael White