Raytheon Company

Santa Barbara Research Center

He Holdings, Inc.

Adam M Kennedy

Stephen H Black

Buu Quoc Diep

Thomas Allan Kocian

Roland W Gooch

Robert K Dodds

Sean P Kilcoyne

Michael D Jack

Justin Gordon Adams Wehner

Michael S Ray

Eric J Beuville

Timothy S Romano

Tse E Wong

Frank B Jaworski

William A Radford

Gregory D Tracy

David VanLue

Larry E Cobb

Mark Lamb

Darin Scot Williams

Juejun Hu

John L Vampola

Christian M Boemler

Micky R Harris

Anuradha Murthy Agarwal

Ryan P Boesch

Ronald L Williams

David R Rhiger

Edward G Meissner

David J Gulbransen

Richard H Wyles

Duane Donald Smith

Michael Aidan Gritz

James F Asbrock

Michael J Batinica

Edward Peter Gordon Smith

John Steven Anderson

Matthew D Chambers

George Paloczi

Eli E Gordon

Todd E Sessler

Kenneth L McAllister

Arthur A Eneim

Neil R Malone

Scott M Taylor

Eric Miller

Monesh S Patel

Paul Bryant

Janine F Lambe

Michael C Bailey

Andrew E Gin

Farhad I Mirbod

Jeffrey K Hamers

Charles E Sarver

Stefan T Baur

Steven M McCabe

Stefan T A Baur

Dmitry Shmoys

Jim Andrew

Jessica K Wyles

Stephen R Gibbs

Roland Gooch

Buu Diep

Buu Q Diep

Edward Meissner

A focal plane array includes a mosaic integrated circuit device having a plurality of discrete integrated circuit tiles mounted on a motherboard. The focal plane array includes an optically continuous detector array electrically connected to the mosaic integrated circuit device with an interposer disposed therebetween. The interposer is configured to adjust a pitch of the continuous detector array to match a pitch of each of the plurality of discrete integrated circuit tiles so that the optical gaps between each of the plurality of integrated circuit tiles on the motherboard are minimized and the detector array is optically continuous, having high yield over the large format focal plane array.

Mosaic focal plane array

An imaging and asynchronous laser pulse detector (ALPD) device, imaging cell of the imaging and ALPD device and method of use is disclosed. A detector generates an electrical signal in response to receiving an optical signal, wherein a frequency of the electrical signal is indicative of a frequency of the optical signal. A first detection/readout circuit is sensitive to a first frequency range, and a second detection/readout circuit is sensitive to a second frequency range. The first detection/readout circuit allows the electrical signal to pass from the first detection/readout circuit to the second detection/readout circuit.

Imager with integrated asynchronous laser pulse detection having a signal component along a second electrical pathway passes through an ALPD readout integrated circuit to an imaging readout integrated circuit

A digital pixel includes a capacitive transimpedance amplifier (CTIA) coupled to a photodiode that receives an electrical charge and output an integration voltage. An integration capacitor coupled to the CTIA accumulates the integration voltage over an integration period. A comparator compares the accumulated integration voltage with a threshold voltage and generates a control signal at a first level each time the accumulated integration voltage is greater than the threshold voltage. A charge subtraction circuit receives the control signal at the first level and discharges the accumulated integration voltage each time the control signal at the first level is received from the comparator. An analog or digital counter receives the control signal at the first level and adjusts a counter value each time the control signal is received from the comparator. An output interface communicates the counter value to an image processing circuit at an end of the integration period.

Digital pixel having high sensitivity and dynamic range

Microbolometer arrays incorporating per-pixel dark reference structures for non-uniformity correction. In one example a thermal imager includes a device substrate, a microbolometer array disposed on the device substrate and including a plurality of detector elements arranged in a two-dimensional array, each detector element including an imaging microbolometer and a reference microbolometer, the imaging microbolometer being configured to receive electromagnetic radiation from a viewed scene and to produce an image signal in response to receiving the electromagnetic radiation, the image signal including a component produced due to thermal noise in the respective detector element, and the reference microbolometer being shielded from receiving the electromagnetic radiation and configured to produce a reference signal indicative of the thermal noise, wherein the thermal imaging device is configured to produce an image of the viewed scene based on a combination of the image signals and the reference signals from the plurality of detector elements.

Per-pixel dark reference bolometer

Methods for reducing wafer bow induced by an anti-reflective coating of a cap wafer are provided. The method may utilize a shadow mask having at least one opening therein that is positioned opposite recessed regions in a cap wafer. The method may further include depositing at least one layer of an anti-reflective coating material through the shadow mask onto a planar side of a cap wafer to provide a discontinuous coating on the planar side.

Method of stress relief in anti-reflective coated cap wafers for wafer level packaged infrared focal plane arrays

A scene projector including an array of light emitting pixels, a tunable filter element, and a spatial light modulator. The tunable filter element is optically coupled to the array of light emitting pixels such that light emitted from the array of light emitting pixels is passed through the tunable filter element as filtered light. The spatial light modulator is optically coupled to the array of light emitting pixels and is configured to generate transmitted light by interacting with the filtered light to control at least one of an amplitude, a phase, and a polarization of the filtered light.

Infrared scene projector with per-pixel spectral and polarisation capability

An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.

Wafer level package solder barrier used as vacuum getter

A microelectromechanical systems (MEMS) package includes a substrate extending between a first pair of outer edges to define a length and a second pair of outer edges to define a width. A seal ring assembly is disposed on the substrate and includes at least one seal ring creating a first boundary point adjacent to at least one MEMS device and a second boundary point adjacent at least one of the outer edges. The package further includes a window lid on the seal ring assembly to define a seal gap containing the at least one MEMS device. The seal ring assembly anchors the window lid to the substrate at the second boundary point such that deflection of the window lid into the seal gap is reduced.

Wafer level MEMS package including dual seal ring

A system and method for forming a wafer level package. In one example, a substrate used in the wafer level package includes a surface defined by a wafer level package (WLP) region and an external region, and a layer of getter material is disposed on at least a portion of the external region. According to one embodiment, the external region comprises a saw-to-reveal (STR) region of the wafer.

Use of an external getter to reduce package pressure

A sealed package having a device disposed on a wafer structure and a lid structure boned to the device wafer. The device wafer includes: a substrate; a metal ring disposed on a surface portion of substrate around the device and a bonding material disposed on the metal ring. The metal ring extends laterally beyond at least one of an inner and outer edge of the bonding material. A first layer of the metal ring includes a stress relief buffer layer having a higher ductility than that of the surface portion of the substrate and a width greater than the width of the bonding material. The metal ring extends laterally beyond at least one of the inner and outer edges of the bonding material. The stress relief buffer layer has a coefficient of thermal expansion greater than the coefficient of expansion of the surface portion of the substrate and less than the coefficient of expansion of the bonding material.

Hermetically sealed package having stress reducing layer

Growing community of inventors

Santa Barbara, CA, United States of America

Adam M Kennedy