Cadence Design Systems, Inc.

Adam D Sherer

Daniel Asher Cohen

John LeRoy Pierce

The present disclosure relates to a computer-implemented method for electronic design verification. Embodiments may include providing an electronic design including, at least in part, one or more hardware description languages and one or more software programming languages. Embodiments may further include calculating configuration information without analyzing the electronic design, wherein the configuration information includes one or more memory elements configured to control a mode of operation of the electronic design. Embodiments may also include determining a change in the one or more memory elements and altering a function associated with the electronic design verification based upon, at least in part, the determined change.

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Chelmsford, MA, United States of America

Adam D Sherer