Growing community of inventors

Aachen, Germany

Achim Nohl

Average Co-Inventor Count = 3.72

ph-index = 4

The patent ph-index is calculated by counting the number of publications for which an author has been cited by other authors at least that same number of times.

Forward Citations = 77

Achim NohlGunnar Braun (8 patents)Achim NohlAndreas Hoffmann (8 patents)Achim NohlRainer Leupers (3 patents)Achim NohlOliver Schliebusch (3 patents)Achim NohlVolker Greive (2 patents)Achim NohlHeinrich Myer (2 patents)Achim NohlOlaf Zorres (2 patents)Achim NohlGideon Intrater (1 patent)Achim NohlJianjiang Ceng (1 patent)Achim NohlHeinrich Meyr (1 patent)Achim NohlOlaf Luthje (1 patent)Achim NohlFrank Fiedler (1 patent)Achim NohlOlaf Lüthje (1 patent)Achim NohlLudwig Rieder (1 patent)Achim NohlJacques Van Damme (1 patent)Achim NohlOlaf W J Zerres (1 patent)Achim NohlAchim Nohl (11 patents)Gunnar BraunGunnar Braun (15 patents)Andreas HoffmannAndreas Hoffmann (15 patents)Rainer LeupersRainer Leupers (9 patents)Oliver SchliebuschOliver Schliebusch (3 patents)Volker GreiveVolker Greive (8 patents)Heinrich MyerHeinrich Myer (2 patents)Olaf ZorresOlaf Zorres (2 patents)Gideon IntraterGideon Intrater (27 patents)Jianjiang CengJianjiang Ceng (2 patents)Heinrich MeyrHeinrich Meyr (1 patent)Olaf LuthjeOlaf Luthje (1 patent)Frank FiedlerFrank Fiedler (1 patent)Olaf LüthjeOlaf Lüthje (1 patent)Ludwig RiederLudwig Rieder (1 patent)Jacques Van DammeJacques Van Damme (1 patent)Olaf W J ZerresOlaf W J Zerres (1 patent)
..
Inventor’s number of patents
..
Strength of working relationships

Company Filing History:

1. Synopsys, Inc. (9 from 2,487 patents)

2. Coware, Inc. (2 from 5 patents)

3. Mips Technologies, Inc. (1 from 271 patents)


11 patents:

1. 9830174 - Dynamic host code generation from architecture description for fast simulation

2. 9317298 - Generation of instruction set from architecture description

3. 9064076 - User interface for facilitation of high level generation of processor extensions

4. 8706453 - Techniques for processor/memory co-exploration at multiple abstraction levels

5. 8595688 - Generation of instruction set from architecture description

6. 8554535 - Instruction-set architecture simulation techniques using just in time compilation

7. 8285535 - Techniques for processor/memory co-exploration at multiple abstraction levels

8. 8086438 - Method and system for instruction-set architecture simulation using just in time compilation

9. 7788078 - Processor/memory co-exploration at multiple abstraction levels

10. 7373638 - Automatic generation of structure and control path using hardware description language

11. 7313773 - Method and device for simulator generation based on semantic to behavioral translation

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12/13/2025
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