Sun Microsystems, Inc.

Abraham E Rindal

Michele K Law

Shawn F Storm

Bradley W Hoffert

Robert Mark Stano

Joseph V Miseli

Kenneth A Gross

Steven M Kurihara

Ronald H Ih

A method and apparatus for driving a plurality of addressable elements consist of driving and selectively enabling one or more addressable elements arranged as an M&times;N array using two drivers. A first and a second driver are used to drive first and second signals at slightly different frequencies on a first and a second display conductor. A plurality of pixels, coupled between the first and second display conductors, is addressed according to a pixel location in which the first signal is approximately in phase with the second signal. The pixel scan rate is proportional to the difference between the first and second signal frequencies. The first and second conductors may contain a plurality of delay elements and tap-off points. Conducting lines may be terminated by their characteristic impedance to prevent any reflection of the traveling signals. The periods of the first and second signals may be greater than or approximately equal to a propagation delay of between first and last tap-off points on the first and second conductors, respectively. The pulse width of the first and second signals may be less than or approximately equal to a propagation time of the first and second signal between adjacent tap-off points on the first and second display conductors, respectively. The matrix display pixels are selectively enabled by modulating an amplitude of the first signal and/or an amplitude of the second signal when the selected pixel location(s) is addressed so that the voltage differential between the first and second signals is sufficient to enable the addressed pixel.

Method and apparatus for selective enabling of addressable display elements

A monitor interface cable for transmitting display data and command data between a computer system and a display monitor preferably including a microcontroller. The monitor interface cable enables both display and command data to be transmitted simultaneously from the computer system to the display monitor.

Synchronous serial display monitor control and communications bus interface

A method and apparatus for driving a plurality of addressable elements consist of driving and selectively enabling one or more addressable elements arranged as an M&times;N array using two drivers. The columns may be addressed in parallel. Columns may be coupled to a conductor by a charge transfer/isolation circuit. A voltage waveform or pulse train may be propagated down the display conductor such that a pulse is present on the display conductor for each element of a row of elements to be addressed. When the beginning of the pulse train has propagated to the last column tap-off point so that a different pulse is present at each column tap-off point corresponding to the row of elements to be selected, a corresponding charge is transferred to each column conductor in parallel. Thus, a voltage is supplied to select each element on the selected row as determined by the state of the pulse train at each column tap-off point. During the time the voltages are supplied to the column conductors, the column conductors are isolated from the column tap-off points so that a next pulse train corresponding to the next element row may be propagated down the conductor. The rows may be selected by any row addressing technique, such as individual row drivers, or a beat-frequency technique employing only two row drivers.

Method and apparatus for selective enabling of Addressable display elements

A method and apparatus for driving a plurality of addressable elements consist of driving and selectively enabling one or more addressable elements arranged as an M.times.N array using two drivers. A first and a second driver are used to drive first and second signals at slightly different frequencies on a first and a second display conductor. A plurality of pixels, coupled between the first and second display conductors, is addressed according to a pixel location in which the first signal is approximately in phase with the second signal. The pixel scan rate is proportional to the difference between the first and second signal frequencies. The first and second conductors may contain a plurality of delay elements and tap-off points. Conducting lines may be terminated by their characteristic impedance to prevent any reflection of the traveling signals. The periods of the first and second signals may be greater than or approximately equal to a propagation delay of between first and last tap-off points on the first and second conductors, respectively. The pulse width of the first and second signals may be less than or approximately equal to a propagation time of the first and second signal between adjacent tap-off points on the first and second display conductors, respectively. The matrix display pixels are selectively enabled by modulating an amplitude of the first signal and/or an amplitude of the second signal when the selected pixel location(s) is addressed so that the voltage differential between the first and second signals is sufficient to enable the addressed pixel.

Method and apparatus for selective enabling of addressable display

A monitor interface cable for transmitting display data and command data between a computer system and a display monitor preferably including a microcontroller. The monitor interface cable enables both display and command data to be transmitted simultaneously from the computer system to the display monitor. Inside the computer system, data containing the commands written to a particular memory location in a video buffer card is applied to various signal lines located in the monitor interface cable. These signal lines are coupled to the microcontroller located in the display monitor which receives the commands and performs various controlling functions in response. Status information in the form of a command is transmitted back across a second signal line to the computer system where various software programs including drivers receive and process the status information. Display data is simultaneously transmitted over other signal lines also located in the monitor interface cable.

Synchronous serial display monitor control and communications bus

Electromagnetic interference ('EMI') is reduced in a CRT video display system by spreading-out the EMI-producing spectra present in the video pixel data and/or clock signals. A clock dropping circuit coupled between the display generator main oscillator and the timing generator periodically phase-modulates the timing generator clock signal such that it comprises N phases, where N.gtoreq.2. As a result, each horizontal line of video data and the horizontal synchronization signals is phase shifted. This dual-shifting effect eliminates display image distortion that would result if only the video signal were shifted. Video distortion is further minimized by deriving the horizontal and vertical synchronizing signals from a common constant clock. EMI energy associated with each clock harmonic is spread by a frequency amount .DELTA.f proportional to the rate of phase change in the clock signal, the rate of phase change exceeding half the bandwidth f.sub.m of a standard EMI measurement reference window. This disperses adjacent spectral energy sufficiently so the reference window measures but one, decreased, amplitude at a time.

Method and apparatus for reducing electromagnetic interference radiated

Arrayed display pixels are coupled such that all row pixels are coupled together by a row conductive element and all column pixels are coupled together by a column conductive element. The row-coupled pixels are driven by first and second row drivers and the column-coupled pixels are driven by first and second column drivers, a total of four drivers in all. The drivers each output time-varying signals of different frequencies. The vertical scan rate is determined by the frequency differential in the signals output by the two row drivers, and the horizontal scan rate frequency is determined by the frequency differential in the signals output by the two column drivers. The absolute frequencies of the four signals are set proportional to the propagation delay of the medium through which the driver signals travel. The invention implements a pixel enabling signal using the beat-frequency difference between two driver source signals that propagate through a pixel string from opposite ends of the string. The driver difference signal dwells sufficiently long on each pixel location to deliver sufficient energy to turn the pixel on or off. Video information to be displayed is used to modulate at least one of the row drivers and one of the column drivers.

Method and apparatus for amplitude band enabled addressing arrayed

Electromagnetic interference ('EMI') generated by a flat panel video display system is reduced by periodically phase/modulating the panel clock. This spreads EMI energy associated with each panel clock harmonic by a frequency amount .DELTA.f proportional to the rate of phase change in the panel clock signal. EMI energy associated with each panel clock harmonic is reduced relative to a square-wave panel clock signal because the same energy is now spread over a group of frequencies centered about each harmonic. The phase of the panel clock is changed at a rate exceeding the bandwidth f.sub.m of a standard EMI measurement reference window. This disperses adjacent spectral energy sufficiently so the reference window measures but one, decreased, amplitude at a time. Phase-modulation may be achieved using a clock pulse dropping circuit that receives a square-wave input of frequency Nf.sub.c from a main oscillator, drops at least one clock pulse out of a stream of M clock pulses, and frequency divides the resultant waveform by N. The resultant panel clock will have two phases, wherein rate of phase change .DELTA.f is Nf.sub.c /2M. The spectral spacing .DELTA.f of sidebands around each harmonic in the EMI spectrum changes as a function of .DELTA.f. Measured EMI is reduced when .DELTA.f=Nf.sub.c /2M&gt;f.sub.m.

Video signals for each primary color are delayed in time relative to every other primary color video signals. When displayed on a cathode ray tube ('CRT') display, the time delayed video signals will result in a separated color pattern for each image displayed. Separated color images are subsequently realigned through use of electron beam deflection controls affecting the horizontal and vertical displacement of electron beams for each color. Measurement of EMI at a far field point varies between zero (no EMI) and no reduction in measurable EMI, depending on the frequency of the video signals and the amount of time delay induced therein. In alternative embodiments, time shifting of video signals may be accomplished either by discrete filter components, simple propagation delay lines.

Methods and apparatus for reducing electromagnetic interference emission

Visible Moire interference is eliminated by alternately shifting the phase of the horizontal sync signal or video signals such that the phase of each video line, and hence the phase of the resulting Moire interference associated with that video line, is also alternately shifted. The phase of the Moire interferences are shifted such that persistence of vision in the human eye averages oppositely phased phosphor intensity variations occurring on alternating scan lines and/or vertical fields. When viewed by a user of the CRT, optical cancellation of the Moire interference patterns results.

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Dunedin, FL, United States of America

Abraham E Rindal