Nxp USA, Inc.

Abhineet Kumar Bhojak

Kshitij Bajaj

Chanpreet Singh

Tejbal Prasad

Anisha Ladsaria

An asynchronous data transfer system includes a bus interface unit (BIU), a FIFO write logic module, a write pointer synchronizer, a write pointer validator, a FIFO read logic module, and an asynchronous FIFO buffer. The FIFO buffer receives a variable size data from the BIU and stores the variable size data at a write address. The FIFO write logic module generates a write pointer by encoding the write address using a Johnson code. The FIFO read logic module receives a synchronized write pointer at the asynchronous clock domain and generates a read address signal when the synchronized write pointer is a valid Johnson code format. The FIFO buffer transfers the variable size data to a processor based on the read address signal.

Growing community of inventors

Noida, India

Abhineet Kumar Bhojak