Western Digital Technologies, Inc.

Abhinand Amarnath

Narendhiran Chinnaanangur Ravimohan

Muralitharan Jayaraman

Balakumar Rajendran

Indu Kumari

Eyal Widder

Rohit Sathyanarayan

Ankit Gupta

Narendhiran Cr

Aspects of a storage device including a memory and a controller are provided which allow for data associated with a deleted file to be recovered from the memory when the data is overwritten by a new file at the same logical address. To locate the data, the controller may identify a logical address associated with the data based on a directory entry associated with a FAT. The controller may determine a physical location of the data associated with the logical address based on one or more control entries in a L2P mapping table, such as a previous control entry in the table. The controller may also determine the physical location based on a hot count associated with the previous control entry. After the physical location is determined, the controller may associate a new logical address with the physical location of the data to recover the deleted file.

Advanced file recovery method for flash memory

A method for error correction in a memory system includes determining a bit error ratio for a memory block of the memory system during a read operation. The method further includes determining whether the bit error ratio is between a first threshold and a second threshold. The method further includes based on a determination that the bit error ratio is between the first threshold and the second threshold, performing a select gate drain (SGD) read operation on a SGD word line of the memory block. The method further includes generating first soft bit data using SGD data corresponding to the SGD read operation. The method further includes performing a low-density parity-check correction using the first soft bit data on the memory block.

Failure mode study based error correction

A storage system and method for improving read performance using multiple copies of a logical-to-physical address table are provided. In one embodiment, a method for parallelism is provided that is performed in a storage system comprising a plurality of memory areas accessible in parallel, wherein each memory area stores a copy of a logical-to-physical address table. The method comprises reading portions of the logical-to-physical address tables in parallel from the plurality of memory areas, wherein the portions comprise translations for logical addresses associated with a plurality of memory commands; translating the logical addresses associated with the plurality of memory commands into physical addresses using the read portions; and performing the plurality of memory commands. Other embodiments are provided.

Storage system and method for improving read performance using multiple copies of a logical-to-physical address table

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Karnataka, India

Abhinand Amarnath